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SM320F2812-EP: High-Temperature-Induced ADC Drift – Looking for Validation and Recommendations

Part Number: SM320F2812-EP

Hello,
I am a senior researcher currently developing a system using the SM320F2812-EP device.
Our application is a battery charger, and we are experiencing an abnormal behavior related to ADC conversion accuracy when the internal temperature rises.

Issue Description
During battery charging, heat generated by other components causes the internal temperature to increase.
When the MCU case temperature exceeds approximately 77°C, the ADC conversion results become increasingly inaccurate.

The abnormal phenomenon observed is:
The measured ADC value becomes lower over time, even though
The OP-AMP output voltage remains higher than the ADC readback value
Additionally, the OP-AMP output voltage increases relative to its input
The OP-AMP is configured as a voltage follower (buffer configuration).

My Current Hypothesis
Temperature increases.
The elevated temperature may cause leakage current in the ADC input MUX FET.
Due to this leakage current, a voltage drop may occur at the sampling node.
As a result, the actual ADC pin voltage remains high, but the ADC digital value decreases over time.

Firmware Workarounds Applied
I implemented the following modifications:

Item                                                           Before      After
ADC Clock                                                 30 MHz    15 MHz
ADC Sample-and-Hold Clock (ACQ_PS)    16            1

Reason for Firmware Modification
The purpose of these changes was to reduce the ADC sampling window size, with the expectation that it may help mitigate temperature-induced leakage behavior.

Request
Could you please review the following points:
Whether my hypothesis regarding temperature-induced leakage currents affecting ADC sampling accuracy is reasonable.
Whether the applied mitigation strategy (lower ADC clock and shorter sampling window) is appropriate or recommended in this situation.
If available, any design guidelines or best practices to minimize temperature-related ADC accuracy drift with this device.

Thank you in advance for your support.