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TMS320F28P650DK: I would like to know about C2000 MCU VREFHI driver design.

Sang-il Nam
Expert 2810 points

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: OPA328, REF34-Q1, OPA388-Q1

Hi,

I plan to configure the external reference voltage circuit as follows to drive the on-chip ADC module of the F28P650DK9 MCU in 12-bit or 16-bit mode.

While proceeding with the relevant design, I searched for reference materials and found the 'VREFHI Driver Design for C2000 ADCs (spraby5)' application note. I reviewed its contents. That document explains that when designing the VREFHI driver circuit, using an Op. Amp.(OPA328) with zero-crossover technology as a voltage follower for the reference voltage output can drive the C2000 MCU on-chip ADCs with best performance.

In my opinion, there shouldn't be a major issue if I connect the voltage output of the REF34-Q1 component directly to the F28P65x's VREFHI port via a bypass capacitor, provided the distance between the reference voltage source and the F28P65x's VREFHI input port is minimized.

I would like to know if there is documentation that explains the difference between the two circuits(Unbuffered Reference vs. Buffered Reference) mentioned in the spraby5 application note in detail, focusing on the ADC result quality. Alternatively, I'm curious if there is any documentation that explains the potential problems or error rates that could occur when using the unbuffered reference circuit to operate the F28P65x's on-chip ADC modules in 16-bit differential input mode.

Finally, if the use of a voltage follower for the reference voltage output is strongly recommended, please check whether the OPA388-Q1 can be used instead of the OPA328 recommended in the application note.

Best regards,
Sang-il

  • 0
    TI__Mastermind 35083 points

    Hello,

    This thread has been assigned to the expert for further review and action. Please note that our team's response times may be slower than usual due to the holiday season. We will get back to you as soon as possible and appreciate your understanding in this matter.
    Thank you for your inquiry and we look forward to assisting you soon.

    Best regards,
    Zackary Fleenor

  • 0 in reply to Fleenor
    Expert 2810 points

    Yes, I understand.

    I'll wait until the additional answer is provided.

    Have a great holiday.

    Thank you.

  • +1 in reply to Sang-il Nam
    TI__Expert 8660 points

    Hi Sang-il,

    The key difference between the “unbuffered” vs “buffered” circuits is how well VREFHI can stay stable during the SAR ADC’s fast transient reference-current pulses. What SPRABY5 summarizes is that unbuffered reference is “sufficient” up to three ADCs for 12-bit (single-ended & differential) and “acceptable” up to three ADCs for 16-bit single-ended, but buffered is recommended for 16-bit differential.

    If you want to try REF34-Q1 directly, then validate by probing VREFHI with a fast scope to check ripple/droop correlated with conversions and comparing ADC FFT/SNR/ENOB vs expectations.

    Finally, OPA388-Q1 is a reasonable candidate if your stability check with the chosen CREF/layout looks clean.

    Best Regards,

    Masoud

  • 0 in reply to Masoud Farhadi
    Expert 2810 points

    Thank you for your response. I will proceed with the test based on the information you provided.