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Concerto GPIO

Joel Clasquin
Intellectual 700 points

Hi,

I'm looking at the example on page 330 of the Concerto Technical Reference Manual and I'm confused.  It says we can write a value of 0xEB to the address GPIODATA + 0x098.  But when I look at F28M35x_Headers_nonBIOS.cmd I find that the GPIOG2DAT is located at 0x006FC0 and its length is 0x000020.  GPIOG1DAT is also only 0x000020 in length.

If I write to those base addresses plus anything greater than 0x00020 won't I be overwriting other registers?

 

Thanks

  • 0
    TI__Expert 3760 points

    Joel:

    The F28M35x_Headers_nonBIOS.cmd file is referencing the C28x GPIO registers (GPIOG2DAT and GPIOG1DAT) refer to GPIO's on the C28x Control subsystem.

    Page 330 of the Concerto Technical Reference Manual is referring to M3 GPIO registers and applies to each M3 subsystem GPIO port. The corresponding software files for M3 registers are located in /MWare/inc/gpio.h file.  For the base address of each GPIO port- see the /MWare/inc/memmap.h file.

    There are also driver functions for manipulating M3 Master subsystem GPIO's in the /MWare/driverlib/gpio.c file:

    void
    GPIOPinWrite(unsigned long ulPort, unsigned char ucPins, unsigned char ucVal)
    {
        // Write the pins.
        HWREG(ulPort + (GPIO_O_DATA + (ucPins << 2))) = ucVal;
    }

  • 0 in reply to Chrissy Chang
    Intellectual 700 points

    Thanks for the quick reply.

    Since I'm working on code that needs to manipulate GPIO pins from the C28 side, I guess this means I can't use the method of writing to the port data register address plus offset (as shown on pg. 330)?   I'll need to do a standard bit by bit set or clear?

    No offense, but I think it's sometimes difficult to tell which core the documentation is talking about.

    Thanks again.

     

  • 0 in reply to Joel Clasquin
    TI__Mastermind 22025 points

    Joel,

    Yes, if you are accessing the GPIO from the C28 you will need to use the header file structures to access the proper register.  Also please remember that all GPIOs initially belong to the M3 and the M3 must hand over control of the GPIO to the C28.  Take a look in driverlib/GPIO.c for this function:

    void GPIOPinConfigureCoreSelect(unsigned long ulPort,
                                           unsigned char ucPins,
                                           unsigned char ucCore);

    On the C28, you do not have to do each GPIO bit by bit.  Instead of doing something like GpioDataRegs.GPADAT.bit.GPIO2 = 1 you can also do GpioDataRegs.GPADAT.all = 0x2...this allows you to modify settings for many pins at the same time.

    I agree the documentation in the TRM isn't very clear.  We are always working to improve our documentation and user experience of our parts.

    Trey