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TMS320F28P559SJ-Q1: Question regarding the Analog Subsystem Connection Configuration of F28P55x.

Sang-il Nam
Expert 2820 points

Part Number: TMS320F28P559SJ-Q1

Hi,

The content of the Analog Subsystem block diagram image (Figure 14-1. Analog Subsystem Block Diagram) and the related tables (Table 14-1 & 14-4) in the TMS320F28P55x Technical Reference Manual (TRM) seem to be inconsistent. (Based on the 128-pin PDT package)

For instance, Figure 14-1 indicates that the A12 channel is selected for HPMXSEL0 of the CMPSS-2 Input Mux.
However, Tables 14-1 and 14-4 indicate that this setting selects the A4 / B8 channels for the HP input of the CMPSS-2 module.
Which one is correct?

Furthermore, while Tables 14-1 and 14-4 provide some understanding of how the Analog Subsystem's input ports are connected to the ADC, CMPSS, DAC, and PGA modules, there doesn't seem to be an image or table that specifically details the exact configuration of the external A/D input channels and other internal connections through the built-in 32-channel multiplexer of each ADC module, from ADC-A through ADC-E. Is there any documentation available for this?

Best regards,
Sang-il

  • +1
    TI__Guru* 85550 points

    Sang-il,

    Thanks for reaching out to us, and pointing out the discrepancy.  I will file a internal ticket to get the figures corrected; the tables are correct with regard to the CMPSS mux assignments.

    In terms of internal connections let me see if this helps explain that aspect:

    ADC:

    The Channel name is the mux position inside the respective ADC.  For example pin 21 on the 128 PDT package is named A2, B6, C9, PGA1_INP.  This pin goes to the following

    ADC A  mux position 2

    ADC B  mux position 6

    ADC C mux position 9

    PGA1, Positive Input

    DAC:

    There are only 2 pins on this device that have a DAC output on them.  You will see DACOUTA out(output from the buffered DAC), and CMP1_DACL(output from the low side DAC of CMPSS1), in the pin/signal name.

    CMPSS:

    These are detailed in Table 14-1 as you have already mentioned.

    PGA:

    The PGA inputs are detailed as part of the pin name.  The output on the pin(for sampling/filtering) is also part of the pin name, i.e. PGA1_OUT.  The internal PGA output connection to the ADC is detailed at the bottom of Table 14-4 along with the temp sensor connection.

    I would say the Table 14-4 is the most comprehensive signal listing in the TRM for all analog blocks.

    Best,
    Matthew

  • 0 in reply to MatthewPate
    Expert 2820 points

    Hi Matthew,

    I understand that the figure information attached to the datasheet is incorrect, and that the information provided in the table is what actually corresponds to the circuit connection.
    Thank you for your prompt response.
    I hope you have a wonderful holiday season.

    Best regards,
    Sang-il