TMS320F28377D: CLB input and output connection

there are also boundary inputs configuration choices, if i choose "No input" and enable CLB inputs, does it mean that CLB inputs are driving the corresponding boundary inputs, if other choice is selected, like "square wave" or "custom wave input", then this port is treat as simulation port?

Nirvana,

Inputs entered in "Boundary Inputs(Simulation Only)" are relevant only when you are performing simulation of logic. If "No input" is selected in Boundary inputs, then that input is not used in the simulation. 
I think the confusion is because of mention of boundary inputs in FSM,LUTs and counters. When performing a simulation, boundary inputs in FSM,LUT and counters are from "Boundary Inputs (Simulation Only)" in Tile Design. If its not for simulation but for actual application, boundary inputs in FSM,LUT and counters are from CLB Inputs in CLB Module.
You can refer to this document CLB Tool User's Guide (Rev. B), to avoid confusion. I hope this helps.

Thanks
Praneeth

so no matter what i choose, in actual use boundary input1 is mapped to CLB input1, and so on

one CLB has 16 outputs, the 12th/13th outputs connect to XBARS and i can choose it as source of output XBAR, in selecting drop menu, "CLBx out4 or out5 " match this CLB output?

i try to route a input signal through input XBAR to CLBXBAR, and then through a straight logic(out = in) to output XBAR, but this syscfg setting does not work, no matter how i changed the input , the output just stuck at zero, what may be the problem? i seems that i can not control the CLB output

Nirvana,
Each CLB has 8 outputs which are replicated to create 16 outputs. Output numbering start from zero. 
I can see that you enabled override for CLB output 12 (which is CLB output 4). When the override is enabled, there is no need to use output XBAR. If override is not enabled, then output XBARs need to be used. Please try only one path and check for output at the pin. 
Thanks,
Praneeth

in the TRM, output12 is connected to XBARS, so i think i can use a output port to test the CLB, but actually i cannot use the output to drive a port, the output stuck at zero. output XBAR source is CLB3 output4

when i manually set the output equations, i just cannot control the output, i have checked clock of CLB3, the clock is gated on, what else can  affect the CLB

Nirvana,
Can you please confirm if you have not enabled the override? If not, please remove Output 12 here. 

Thanks,
Praneeth

how to enable the override? 

i use the direct way to read CLB3_OUT_EN register, the value is zero

does this mean that i need set the output enable manually? or there is another method to deal with it?

i set the musk, but the clb3_out_en register is still zero, how to set it?

Nirvana,
Is it possible for you to share your syscfg file?
Thanks
Praneeth

c2000.pptx

i can not upload syscfg file, i change the file extension to pptx

i read clb_dbg_out register to see whether the input is pass to the output port, but i get nothing, it seems the CLB module does not work at all

nirvana,
pptx file is not opening. For your case, you can simply override the pin. You can refer to driverlib example clb_ex12_output_intersect found in C:\ti\C2000Ware\driverlib\f283xd\examples\clb. In this example, override is illustrated, along with syscfg file.
Thanks,
Praneeth

i think you might change the file name to "c2000.syscfg" to make it work.

the demo "ex12_output_intersect" does not include override, there is only a tile configuration demo there

i just can see the configuration for output LUT

and all the demos in DriverLIB about CLB do not have any information about CLB input and output setting, did i import the project correctly?

the CLB configuration interface is like this and i cannot even to test this demo.

old demo seems for the eclipse platform, are there demos for the 20.x VS platform?

nirvana,
In this particular example for this device, syscfg is used only to configure TILE. In clb_ex12_output_intersect.c file you can see the configuration of CLB. 
And have you enabled ePWM clock? I cannot see your sysconfig file. So please ensure you enabled corresponding ePWM clocks, as described below in TRM:

Thanks 
Praneeth

c2000syscfg.rar

uploading the syscfg file in the *.rar format, i just read the PLLCR2 register all epwm module's clock is enabled

nirvana
I am going through your configuration. Can you disable the override as shown?

And enable output Xbar mux as shown.

check the output at the pin.
Thanks,
Praneeth

disable CLB1 setting and using CLB3 output to drive XBAR? do i need to clear CLB2 output override setting?

 i disabled CLB1 and CLB2's output overriding, set the output4 fixed to 1, but i cannot get the right result at the IO port

nirvana,
I meant to disable override for CLB3. Sorry for the confusion. Now set the output4 to 1, and route it to the pin using OutputXbar, as you have shown. It is working on my side with this configuration.
Thanks
Praneeth

output1 cannot route to output xbar, how do you set that?

nirvana,
Set the Output4 of CLB3 ( OULUT4/OUTPUT 12) to one, route it to the pin using OutputXbar. Disable the override of CLB3.
Thanks
Praneeth

i did what as you said, but it did not work. syscfg setting as below

the output port still cannot drive the led

nirvana,
That is strange. This configuration is working for me. Can you try with only CLB and outputXBAR configured? Your configuration looks good as well.
Thanks
Praneeth

hi, can you share your configuration file or project, i may use this file to test CLB functionality

Nirvana,
Your configuration looks correct. Can you please create a new project with only CLB and output XBAR and check if it is working? And also I am closing this thread. Please open a new thread if new project is also not working. 
Thanks,
Praneeth

a new project setting still does not workc2000.rar

from the register page, i can see CLB1's clock is enabled, but i still cannot control the output pin, could you test my syscfg setting

it is a new project

Nirvana,
Write output logic equation as i0(as shown). Do not give number. And make input 0 as one. It should work. And in OutputXBar configuration, disable invert.

Thanks
Praneeth

i tried this setting, but it did not wok.

c2000 28377D syscfg.rar

could you kindly check this syscfg file for me or just give me a syscfg file that can work?

Nirvana,
Unfortunately, I am not allowed to share files. But in your syscfg file, ePWM is not configured. CLB will not get clock if ePWM is not configured, as mentioned in technical reference manual. Please enable the corresponding ePWM module.
Following is my configuration

This worked for me. If you still not able to see the output, please check if you can see ePWM pulses. 
Thanks
Praneeth 

i have tried use standalone sysconfig tool to config a chip, it seems that i can use this method to suppress an output port, but when i add some logic in the CLBx, it does not work, though i use the watch tool and see the toggling of CLBx output port, i cannot see the toggling on the pin, it is strange. i verify this on a 280048c chip.

Nirvana,
Can you please open a new thread for this, with detailed explanation? As the query for which this thread is opened is different. 
Thanks
Praneeth

last question, i check the datasheet, it seems that TMS320F28377D do not support CLB module, can you check it for me?

can i just switch to 28379D with the same package? for the 28377D, package is PTP176

Nirvana,
Yes,28377D does not have CLB units, as shown in the datasheet. As there are examples in the library, I too thought CLB is available for 28377D. This might be the reason why this configuration is not working.
Yes you can switch to 28379D, as package is same.
Thanks 
Praneeth