Part Number: TMS320F28P650DK
Hi TI Team,
We are currently working with the eCAP module on an TMS320F28P650DK9NMR device and would appreciate your support in reviewing our configuration, as we are stuck in the middle of our development cycle due to this issue.
Hardware / Software Details
Device: TMS320F28P650DK9NMR
IDE: Code Composer Studio
eCAP Instance: eCAP1 (for initial functionality verification)
Input Signal: External pulse signal (2.5 Hz to 91.7 Hz)
GPIO Used: GPIO14
Routing: GPIO14 → Input XBAR → eCAP1
Configuration Level: Register-level configuration
Final Requirement:
In the final design, the external sensor signal (2.5 Hz to 91.7 Hz) will be captured using HREC eCAP6 and eCAP7.
For now, we are validating basic eCAP functionality using eCAP1 before moving to the HREC eCAP modules.
Objective:
We are configuring eCAP1 in capture mode to measure:
Signal period
Duty cycle
The eCAP module is configured in continuous mode, with the time-stamp counter reset on Capture Event 4 (CAP4).
Expected Behavior:
eCAP1 detects rising/falling edges on the external pulse signal
Capture registers CAP1–CAP4 update correctly
CEVT4 interrupt triggers after the 4th capture event
ISR (eCap1_isr) is executed continuously
Actual Behavior Observed:
eCAP1 interrupt is not triggered
ISR is never entered (confirmed using breakpoints)
CAP1–CAP4 registers do not update
External pulse signal on GPIO14 is verified using an oscilloscope
Additional Observations:
GPIO14 toggling and signal integrity are confirmed externally
PIE, CPU interrupt, and vector table configurations appear correct
Breakpoints inside the ISR are never hit, confirming no interrupt occurrence
Request for Support:
Could you please help us verify the following:
GPIO14 configuration and Input XBAR routing
eCAP1 register configuration (capture mode, continuous mode, CAP4 reset)
Interrupt enable and PIE mapping
Any missing steps required to activate eCAP capture or interrupts
Is there any configuration deviation or missing initialization that could prevent the eCAP module from detecting edges or generating the CEVT4 interrupt in this setup?
Code Reference
We have attached the complete configuration and interfacing details (GPIO, Input XBAR, eCAP, and ISR code) in the attached text file for your review.
This issue is currently blocking further development, and timely guidance from your side would greatly help us move forward.
Thank you for your support.
