Part Number: TMS320F28377D
Other Parts Discussed in Thread: ADS7028
I am trying read data in ADS7028 in auto-seq mode. I have started developing to sending data to write on the ADS, however the below configuration, I wanted to check before connecting the control card ADS7028 SPI connector.
Below is my code.
#include "driverlib.h"
#include "device.h"
#define ADS_SPI_BASE SPIC_BASE
#define ADS_CS_GPIO 53 // Manual Chip Select
#define OPCODE_WRITE 0x08
#define REG_ADDR 0x11
#define REG_DATA 0x01
// --- Prototypes ---
void InitSystem_And_GPIO(void);
void InitSPI_DebugMode(void);
void ADS_RegisterWrite(uint8_t regAddr, uint8_t data);
void main(void)
{
// 1. Initialize System
Device_init();
Device_initGPIO();
Interrupt_initModule();
Interrupt_initVectorTable();
// 2. Setup Pins
InitSystem_And_GPIO();
// 3. Setup SPI (1 MHz, 8-bit mode for 3-byte writes)
InitSPI_DebugMode();
// 4. Power Up Delay
DEVICE_DELAY_US(5000);
while(1)
{
ADS_RegisterWrite(0x11, 0x01);
DEVICE_DELAY_US(50);
}
}
void InitSystem_And_GPIO(void)
{
GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
// Configure SPI-C Pins (GPIO 50, 51, 52)
GPIO_setMasterCore(50, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_50_SPISIMOC);
GPIO_setPadConfig(50, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(50, GPIO_QUAL_ASYNC);
GPIO_setMasterCore(51, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_51_SPISOMIC);
GPIO_setPadConfig(51, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(51, GPIO_QUAL_ASYNC);
GPIO_setMasterCore(52, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_52_SPICLKC);
GPIO_setPadConfig(52, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(52, GPIO_QUAL_ASYNC);
// Configure CS Pin (GPIO 53) as Manual Output
GPIO_setMasterCore(53, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_53_GPIO53);
GPIO_setDirectionMode(53, GPIO_DIR_MODE_OUT);
GPIO_writePin(53, 1); // Start High
}
void InitSPI_DebugMode(void)
{
SPI_disableModule(ADS_SPI_BASE);
// Config: 1 MHz, 8-bit Data Size, Mode 0 (Polarity 0, Phase 0)
// We use 8-bit size so we can send Opcode(8) + Addr(8) + Data(8)
SPI_setConfig(ADS_SPI_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA1,
SPI_MODE_MASTER, 1000000, 8);
SPI_disableLoopback(ADS_SPI_BASE);
SPI_setEmulationMode(ADS_SPI_BASE, SPI_EMULATION_FREE_RUN);
// Enable FIFO (Helps buffer the 3 bytes)
SPI_enableFIFO(ADS_SPI_BASE);
SPI_enableModule(ADS_SPI_BASE);
}
void ADS_RegisterWrite(uint8_t regAddr, uint8_t data)
{
GPIO_writePin(ADS_CS_GPIO, 0);
DEVICE_DELAY_US(2);
GPIO_writePin(ADS_CS_GPIO, 0);
DEVICE_DELAY_US(2); // t_CSSC delay
// Send all 3 bytes
SPI_writeDataBlockingFIFO(ADS_SPI_BASE, OPCODE_WRITE); // Write command
SPI_writeDataBlockingFIFO(ADS_SPI_BASE, regAddr); // Register address
SPI_writeDataBlockingFIFO(ADS_SPI_BASE, data); // Data
// Wait for transmission to complete
// Check if SPI is still busy
while(SPI_isBusy(ADS_SPI_BASE)) {}
DEVICE_DELAY_US(20);
GPIO_writePin(ADS_CS_GPIO, 1);
DEVICE_DELAY_US(2);
}
1. Clk signal
2. MOSI
3. CS
There is no pull up in the hardware for any signal. MOSI should generate signal bits in within the clock cycle, right?
