Part Number: TMS320F280039C
Other Parts Discussed in Thread: C2000WARE
I am working with the SCI modules available on the Launchpad.
I set a particular baud rate, and send data via the SCI-TX pin on the launchpad to view it in a logic analyzer.
I see that the expected baud rate and actual baud rate are significantly different.
For example, say I have set the baud rate to 9600 (SCIHBAUD & SCILBAUD set to 0x5 and 0x15 respectively), SYSCLK is set to 100MHz, LSPCLK is set to SYSCLK/1 making it 100MHz and character length per frame is 8 bits.
The waveform is as shown below: (Header 'S' is shown here)
The first bit is the start bit (0), followed by 'S' in bit form (01010011) sent from LSB first to MSB last and then comes the stop bit (1). No parity bit is set.
The width of one bit determines the baud rate, seen above as 115us, which when converted to baud rate, becomes 8695, instead of 9601 (9% error).
When I use this actual baud rate (8695) to convert back to the LSPCLK being used in the SCI module (8695 = (LSPCLK)/(BRR+1)/8, BRR is 1301) LSPCLK comes out as 90.5671MHz, instead of the 100MHz set.
I know that the actual SCI baud rate will not be exactly the same as expected baud rate, but this much error is not expected.
Even the TRM for F28003x states that for LSPCLK at 100MHz, and set baud rate of 9600, the expected baud rate is 9601, with an error of 0.01% as shown below:
I have checked the same for other baud rates as well, and every one of them has significantly more error than expected.
I am beginning to wonder whether there is something wrong with LSPCLK itself, the source of the CLK used by the SCI module to send data. Unfortunately, I don't see a method to view its waveform in the TRM (there is one method to use GPIO for other clock signals like PLL ones, but not for LSPCLK).
Let me know what you think of this, because it is becoming difficult to set a proper baud rate when receiving this data elsewhere, like PuTTY, as the difference is significant.
Thanks and regards,
Sumukh.
