Hi Experts,
My customer is having bissc issue where the encoder clock would last longer than expected and only stop at the next cycle. Below is an example waveform
The yellow is the encoder clock and the blue is a GPIO connected output of the primary state machine FSM1
The GPIO is connected to the outlut5 of the CLB. Since the F2879d biss-c CLB project is not open source, we can only take reference from the F28P65 project in the motor control SDK, where the outlut5 is set as the output of FSM1 S0.
However, the below zoom-in picture shows that the blue turns high after several cycles of encoder clocks, this is more similar to the behavior of FSM1.S1 instead of FSM1.S0, I am confused.
Could you please help confirming if the outlut5 and outlut6 is the FSM S0 and FSM S1 respectively on F28379? This will determined which state the state machine is stuck.
In the meantime, this issue only happens by chance, on some boards. ABA test shows that the issue follows the DSP.
What might the cause of this issue?
Regards,
Hang
