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TMS320F28388D: Unused EMIF pins

TheLam Nguyen
Prodigy 20 points

Part Number: TMS320F28388D

Ladies and gentlemen,

I'm designing with TMS320F28388D device and I intend to interface it with FPGA. The FPGA will function as a SRAM bank and in our application we need 17 pins for address, and 16 pins for data. This device has 176 pins in total and only support EMIF1. Since we use only 16 pins for data and 17 pins for address, can the remaining pins be used as GPIO? If so there are any caveats for this. Thank you for your support and hope you have a wonderful day.

Best Regards,

TheLam Nguyen

  • 0
    TI__Mastermind 20601 points

    Hi,

    Yes you can definitely use the remaining pins as general purpose GPIOs. You can also take a look at the data sheet as the GPIOs pins may be multiplexed with other peripherals which you can make use of in your system

    Regards,

    Peter

  • 0
    Prodigy 20 points

    Hi Peter,
    Thank you for your response. In my application, the F28388D is the host and FPGA is used as external asynchronous 16 bit (data width) memory to store data. I study the SPRAC96A document and it shows that the address line is a bit unusual on page 6. The starting address line is EMIF1BA1 instead of A0 (Table 4). Should I follow that table or just use A0 for the starting address line and so on? Please advise me on this matter. 

  • 0 in reply to TheLam Nguyen
    TI__Mastermind 20601 points

    Hi The,

    Do you expect to be using only 32-bit word accesses? If so, then you should be fine to maintain and match the pin numbering. Otherwise, if you need to use 16-bit data access, you should follow the offset scheme shown in page 6

    Regards,

    Peter