Part Number: TMS320F28377D
Hello experts,
We are experiencing a memory corruption issue with two memory devices connected to EMIF1 on the 28377D:
- 1st device is an SDRAM chip; chip select is CS0
- 2nd device is a static memory; chip select is CS3
1st device (SDRAM) always functions properly, and there is never a data corruption in SDRAM.
2nd device (SRAM) functions properly when writes to SDRAM are disabled. When we enable writing to SDRAM, we see erroneous data values being written to SRAM.
Both devices are used to buffer large amounts of data at runtime, and data is being streamed at regular intervals (in bursts of 20-30 words).
The actual value showing up in SRAM is NOT random - it's always the last value being written to SDRAM (writes to SDRAM are periodic... approximately once every 200 us). This value shows up at random addresses in SRAM.
We've tried both direct writes to SDRAM, as well as DMA writes, and did not see any difference: it seems to be occurring with the same probability. As soon as we disable SDRAM writes (although refreshes are still active), we see no more errors in SRAM.
Are there known limitations of this EMIF preventing this configuration from working properly?
Is any special handling required to operate two external memories in this configuration (SDRAM + SRAM)?
Can anything be inferred from this symptom - last value written to SDRAM "spilling over" into SRAM?
Thank you!
