TMS320F28P650DK: EtherCAT Slave Initialization

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: SYSCONFIG, C2000WARE

He ASM Team, 

posting on customer behalv: 

We are currently working with the evaluation board www.ti.com/.../LAUNCHXL-F28P65X, and we are observing - both with our own software and with TI’s example project (f28p65x_cpu1_echoback_solution) - that the EtherCAT core sporadically does not respond to accesses from the EtherCAT side after a reset from the external reset pin (everything else seems to work).

So far we have been able to narrow down the issue to the following: it occurs depending on the compiler optimization level used (it happens with -O4, but not with -O0). This suggests that the problem may be related to timing issue during the initialization of the registers.

Since the datasheets do not provide detailed information on this, I would like to ask whether there are more detailed requirements regarding the initialization phase, or whether this issue is known and if there is possibly a solution or workaround available.

 

Thank you for your support, 

Marinus