TMS320F28377S: Low power mode in TMS320F28377S

Hello,

HIBERNATE mode is the lowest power mode on this device. It is a global low-power mode that gates the supply voltages to most of the system. HIBERNATE is essentially a controlled power-down with remote wakeup capability and can be used to save power during long periods of inactivity.

Table 6-8 in datasheet describes the effects on the system when the HIBERNATE mode is entered: https://www.ti.com/lit/ds/symlink/tms320f28377s.pdf

For more information on all low-power modes available and its functionalities, please refer to the datasheet:  https://www.ti.com/lit/ds/symlink/tms320f28377s.pdf

and TRM Chapter 3.10: https://www.ti.com/lit/ug/spruhx5i/spruhx5i.pdf

The device current consumption at 200-MHz SYSCLK is shown in Section 6.5.1. Current values listed in the section are representative for the test conditions given and not the absolute maximum possible. The actual device currents in an application will vary with application code and pin configurations. 6.5.3 Reducing Current Consumption section showcases some methods to reduce the device current consumption.

Hope this helps.

Dear Stevan,

Thank you for the detailed response. We had a look at the datasheet and HW manual.

We have the following queries:

1. Since our requirement is <500 µA sleep‑mode current, please confirm the minimum current consumption of the MCU in HIBERNATE mode. 

2. As per the reference manual, entering HIB mode requires configuring all I/Os to the desired isolation state and disabling any active analog modules. Except for GPIO41 (HIB_WAKEUP), which remains active, all other pins will be isolated from the external interface. Please clarify if our understanding is correct.

3. We would like to understand if the MCU could be made to wake up by signals through CAN / UART interface.

Best Regards,

Prahaladh S

Prahaladh,

1. Typical current consumption of Hibernate mode is 300 uA, so it satisfies your requirement of <500uA

2. Yes, that is correct. Unlike the clock-gating modes, HIB does not have a true wakeup. Instead, GPIO41 becomes HIBWAKE, an asynchronous reset signal. When the boot ROM detects a HIB wakeup, the boot ROM avoids clearing M0 and M1 and calls a user-specified I/O restore function. To prevent glitches on internal and external signals, XRS also generates a HIBWAKE signal during HIB

3. I would need to verify if CAN / UART have that feature for TMS320F28377S. For now, please refer to this e2e post: e2e.ti.com/.../wake-up-by-a-specific-can-message

Dear Steven,

Thank you for your response.

We have the following queries as well...

1. Our requirement is < 500 µA in sleep. 
  Please confirm the minimum and maximum current in HIBERNATE mode for [TMS320F28377S]. Our current understanding is typ 1.1 mA, max 8.25 mA—kindly verify if these figures are correct for the deepest hibernate state.

2. Does HIBERNATE keep only the core/always‑on domain powered? Specifically, is GPIO41 (HIB_WAKEUP) supplied in HIB if its bank is on VDDIO?
3. Our system is battery‑powered and must monitor VBAT even in HIB. Please confirm whether an always‑on ADC/comparator is available in HIB, or suggest a recommended low‑power method to monitor VBAT and generate a wake event.

Requesting your insights on this aspect.

Best Regards,

Prahaladh S

Prahaldh,

Thank you for reaching out. Please allow me some time to check these information and get back to you. If needed I will reach out to the design team for more details on specifications. Thank you for your patience. 

Hi Prahaladh,

Based on the discussion on this thread, I believe you would need an MSPM0G-series device, as it supports a CAN interface.

For example, here are the supply current characteristics for the MSPM0G3507:

We also have a tool called MSPM0-CALC, which can help you estimate power consumption for an MSPM0G device.

Best,

Owen

Dear Steven & Owen,

Thank you for your detailed response.

We'll look into the details & proceed accordingly.

Best Regards,

Prahaladh S