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[FAQ] TMS320F28P550SJ: F28P55x ADC zero offset calibration

Stevan Duraskovic
Expert 7910 points

Part Number: TMS320F28P550SJ

I had an issue with ADC Zero Offset calibration. I followed steps outlined in TRM, but for some reason my Vreflo ADCRESULTREG keeps showing zero instead of certain offset. Could you help me with this issue, please?

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  • 0
    TI__Expert 7910 points

      Hello,

    The ADCOFFSET TRIM register works by canceling out ADC offset values. Writing +112 would subtract 112 from the ADC offset, not add it.

    To fix it, you should write 3984 (2^12 - 112) or (0xF90) in 12-bit mode. This would properly add an artificial offset to account for negative offset that can reside in the ADC core and give you a proper VREFLO conversion result in ADCRERESULT register.