F29H850TU: F29H85x PWM and GPIO configuration for CPU3

Part Number: F29H850TU
Other Parts Discussed in Thread: SYSCONFIG

Hello,

We're using a dual-core C2000 chip (with CPU1 and CPU3). We're having trouble getting PWM and GPIO to work on CPU3 when we configure it using c29x3.syscfg. The same settings work fine on CPU1. We think we're missing something basic. 

What's not working:

1. PWM Output on CPU3:

• Goal: Get PWM signals from an ePWM module (like EPWM4, EPWM5, EPWM6) assigned to CPU3, configured with c29x3.syscfg.
• What we did: We set up all the ePWM registers (like EPWMxRegs.TBCTL, EPWMxRegs.CMPA, EPWMxRegs.AQCTLA) correctly for CPU3 using SysConfig or direct register writes. When we debug, the PWM counter (TBCTR) runs perfectly.
• Problem: No PWM signal comes out of the pins. The pins are either stuck high/low or completely inactive.
• Works on CPU1: If we use the exact same settings in c29x1.syscfg for CPU1, the PWM signals come out of the pins with no problems. This tells us the PWM setup itself is correct, but something is wrong when CPU3 tries to control it.

2. GPIO Control on CPU3:

• Goal: Control specific GPIO pins (like turning an LED on/off) from CPU3.
• What we did: We know GPIOs are usually set up by CPU1 on dual-core C2000s, so we used c29x1.syscfg. We picked the GPIO pin and set "Core Select" to "CPU3". Then, in our CPU3 code, we tried to change the pin state with GPIO_writePin().
• Problem: The GPIO pin doesn't change state or respond to CPU3's commands.
• Works on CPU1: If we set "Core Select" to "CPU1" in the same c29x1.syscfg, CPU1 can control the GPIO pin perfectly. This means our GPIO setup is fine, but CPU3 can't take control of the GPIO even when assigned.
• Also, we can't use the built-in function like GPIO_writePin in the CPU3 core main.c. The compiler pops up error due to being "undeclared identifier"
  
  
  
  In the CPU1 main.c is like below:
  
  
  int main(void)

  {  

      Device_init();

      Board_init();

  
  
  

      SSU_configBootAddress(SSU_CPU3, CPU3_RESET_VECTOR, SSU_LINK2);

      SSU_configNmiAddress(SSU_CPU3, CPU3_NMI_VECTOR, SSU_LINK2);

      SSU_controlCPUReset(SSU_CPU3, SSU_CORE_RESET_DEACTIVE);

      while(SysCtl_isCPU3Reset() == 0x1U);

   

      ESTOP0;

      ENINT;

      Interrupt_enableGlobal();

     

      IPC_sync(IPC_CPU1_L_CPU3_R_CH0, IPC_FLAG31);

      //v_MULTICORE_TestSendCommand();

   

      while(1)

      {

  test1++;

      }

  }
  
  The CPU3 main.c:
  
  
  int main(void)

  {

      Device_init();

      Board_init();

  
  

      ENINT;

      Interrupt_enableGlobal();

  
  

      IPC_sync(IPC_CPU3_L_CPU1_R_CH0, IPC_FLAG31);

      //v_MULTICORE_TestSendCommand();

      v_ADC_StartConversions();

  
  

      while(1)

      {

         ++test3;

      }

  }
  
  Lastly, test1 and test3 variables are continously increasing that means both CPU enter the while true after passing the IPC hold