TMS320F28P659DH-Q1: QPOSCNT count maximum clock cycle

Kita Li

Hi experts,

My customer has question about EQEP module. If eqep XCR is configured as up-down count, what is the maximum clock cycle for a QPOSCNT count once?

Best Regards

Kita

4 months ago

0 Divesh Dang 18431815 4 months ago

TI__Intellectual 920 points

Hi,

Could you please elaborate your query?

Thanks,

Divesh

0 Divesh Dang 18431815 4 months ago in reply to Divesh Dang 18431815

TI__Intellectual 920 points

Hi,

Let us suppose that the CAPCLK prescaler is maximum i.e. 128 and unit position event is at 1 POS count. The CPU clock (SYSCLKOUT=200 MHz/5 ns). The total time for one count would be 128*5 n=640 ns. The capture timer is 16 bit and hence it can count up to 65535. Therefore, maximum clock period is 640*65535 ns. This would give minimum frequency value i.e. 1/(640*65535ns)=23.84 Hz.

Thanks,

Divesh

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28P659DH-Q1: QPOSCNT count maximum clock cycle