Part Number: TMS320F28P559SJ-Q1
I am using the F28P559SJ9PZRQ1 to configure the CLA, it comes an issue when using RAMLS8 and RAMLS9 as CLA program configured.
I am referring the example from C2000, configured the RAMLS8 and RAMLS9 as CLA used and CLA program, copy the CLA program to CLA RAM to run, the CLA task cannot be trigged by PWM interrupt, also failed by changing to software trigger in the PWM interrupt(PWM interrupt is normal triggered) . When I configured RAMLS0 as CLA program, CLA task is trigged correctly with PWM interrupt. I am testing the code on the Lauchpad and use a pin to toggle in the CLA task.
The same usage of RAMLS8 and RAMLS9 in the F28P65 is working fine. So I am very curious where is the problem, I also checked the E2E and there is no relative issue found. Could you please check where is the problem?
The configuration relative to the CLA is as follows. Also attached the .cmd file for your reference.
void MEMCFG_init(){
//
// Initialize RAMs
//
MemCfg_initSections(MEMCFG_SECT_MSGCPUTOCLA1);
MemCfg_initSections(MEMCFG_SECT_MSGCLA1TOCPU);
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCPUTOCLA1));
while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCLA1TOCPU));
//
// Select LS8RAM and LS9RAM to be the programming space for the CLA
// First configure the CLA to be the controller for LS8,LS9 and then
// set the space to be a program block
//
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS8,MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS8,MEMCFG_CLA_MEM_PROGRAM);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS9,MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS9,MEMCFG_CLA_MEM_PROGRAM);
//
// Next configure LS0RAM and LS1RAM as data spaces for the CLA
// First configure the CLA to be the controller for LS0(1) and then
// set the spaces to be code blocks
//
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_DATA);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_DATA);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
MemCfg_setCLAMemType(MEMCFG_SECT_LS2, MEMCFG_CLA_MEM_DATA);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS3, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS6, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS7, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
// Configure GSRAMs
//
//
// Configure Access Protection for RAMs
//
MemCfg_setProtection(MEMCFG_SECT_M0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_M1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS2, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS3, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS4, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS5, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS6, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS7, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS8, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_LS9, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS0, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS1, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS2, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
MemCfg_setProtection(MEMCFG_SECT_GS3, MEMCFG_PROT_ALLOWCPUFETCH | MEMCFG_PROT_ALLOWCPUWRITE | MEMCFG_PROT_ALLOWDMAWRITE);
//
// Lock/Commit Registers
//
//
// Enable Access Violation Interrupt
//
//
// Correctable error Interrupt
//
MemCfg_setCorrErrorThreshold(0);
MemCfg_disableCorrErrorInterrupt(MEMCFG_CERR_CPUREAD);
}
void CLA_init()
{
#ifdef _FLASH
#ifndef CMDTOOL // Linker command tool is not used
//
// Copy the program and constants from FLASH to RAM before configuring
// the CLA
//
memcpy((uint32_t *)((uint32_t)&Cla1ProgRunStart + (0x10000U)), (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize);
memcpy((uint32_t *)&Cla1ConstRunStart, (uint32_t *)&Cla1ConstLoadStart,
(uint32_t)&Cla1ConstLoadSize );
#endif //CMDTOOL
#endif //_FLASH
myCLA0_init();
}
void myCLA0_init(){
//
// Configure all CLA task vectors
// On Type-1 and Type-2 CLAs the MVECT registers accept full 16-bit task addresses as
// opposed to offsets used on older Type-0 CLAs
//
#pragma diag_suppress=770
//
// CLA Task 1
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_1, (uint16_t)&Cla1Task1);
CLA_setTriggerSource(CLA_TASK_1, CLA_TRIGGER_EPWM7INT);
//
// CLA Task 2
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_2, (uint16_t)&Cla1Task2);
CLA_setTriggerSource(CLA_TASK_2, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 3
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_3, (uint16_t)&Cla1Task3);
CLA_setTriggerSource(CLA_TASK_3, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 4
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_4, (uint16_t)&Cla1Task4);
CLA_setTriggerSource(CLA_TASK_4, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 5
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_5, (uint16_t)&Cla1Task5);
CLA_setTriggerSource(CLA_TASK_5, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 6
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_6, (uint16_t)&Cla1Task6);
CLA_setTriggerSource(CLA_TASK_6, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 7
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_7, (uint16_t)&Cla1Task7);
CLA_setTriggerSource(CLA_TASK_7, CLA_TRIGGER_SOFTWARE);
//
// CLA Task 8
//
CLA_mapTaskVector(myCLA0_BASE, CLA_MVECT_8, (uint16_t)&Cla1Task8);
CLA_setTriggerSource(CLA_TASK_8, CLA_TRIGGER_SOFTWARE);
//
// Disable background task
//
CLA_disableBackgroundTask(myCLA0_BASE);
#pragma diag_warning=770
//
// Enable the IACK instruction to start a task on CLA in software
// for all 8 CLA tasks. Also, globally enable all 8 tasks (or a
// subset of tasks) by writing to their respective bits in the
// MIER register
//
CLA_enableIACK(myCLA0_BASE);
CLA_enableTasks(myCLA0_BASE, CLA_TASKFLAG_ALL);
//
// Force task 8, the one time initialization task
//
CLA_forceTasks(CLA1_BASE, CLA_TASKFLAG_8);
}


