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TMS320F28P650DK: SYSCONFIG message for EMIF

Nobuhiko Wasa
Intellectual 1090 points

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: SYSCONFIG

Hi Team,

My customer is asking me about EMIF conficguration with SYSCONFIG.
Customer would like to use EMIF to communicate with FPGA, with asynchronoue mode, 16-bit bus. Here is customer's configuration;
- With C2000 SDK
- Add EMIF1, only CS3 is enabled. CS0, CS2, CS4 are disabled
- Word size = ASRAM/FLASH with 16 bit data bus
- Address Bus MSB = EM1A7
- Enable Extended Wait = Disabled
- Pinmux Use Case = CUSTOM
- Pins used as below

Customer's question is that there are some messages "Non-required pin enabled" for DQM0, DQM1, and RNW. Especially for DQM0/1, this message seems to be unmached to Figure 11-10 of TRM page 1774. Why does this massage appear? Customer doesn't need to use DQM in this use case?

Thanks,
Nobuhiko Wasa

  • 0
    TI__Guru**** 200206 points

    HI,

    Both RNW (read/write) and DQMs (byte enables) are optional. The BA[1] for 16-bit Async interface is used to connect to memory Address[0]. 

  • 0 in reply to QJ Wang
    TI__Intellectual 1090 points

    HI QJ,

    Do you mean RNW and DQMs should be used depending on the device connected via EMIF?

    Thanks,
    Nobuhiko Wasa

  • 0 in reply to Nobuhiko Wasa
    TI__Guru**** 200206 points

    It depends on the memory being interfaced. For typical asynchronous EMIF configurations—such as interfacing with Asynchronous SRAM or NOR Flash, DQMs (Byte Enables) are usually required, while RNW (Read/Not-Write) is generally not required.

    DQMs:  if you are performing byte-writes (e.g., writing 8 bits to a 16-bit memory), the byte enables (DQMs) must be asserted correctly to prevent overwriting adjacent bytes.

    Many EMIFs use a dedicated Read Enable (nOE) and Write Enable (nWE) rather than a single RNW pin.