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TMS320F28P650DK: PMP23630 specification

?? ?
Prodigy 20 points

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: PMP23630, PMP41081

Dear TI Team,

I am very interested in the PMP23630 reference design and would like to ask a few questions regarding its documentation and technical implementation.

Could you please let me know when more detailed materials, such as the test report and full BOM, are expected to be publicly available? In the meantime, I have a technical question regarding the hold-up implementation. Based on the currently available documentation, I could not find any explicit description of hold-up functionality. From the board layout and available photos, it appears that the six large electrolytic capacitors connected in parallel may serve both as DC link capacitors and as hold-up energy storage. Additionally, I am wondering whether the LLC converter’s wide frequency operating range is intentionally utilized to support the hold-up duration.

I would greatly appreciate it if you could kindly confirm whether this understanding is correct, even if detailed documentation is not yet available. Thank you very much for your support.

Best regards,

Haneul 

  • +1
    TI__Expert 5590 points

    Hello,

    Documentation and firmware on this reference design is estimated to be available on ti.com by the end second quarter. Meanwhile I can answer your question. Hold-up capacity in server PSU PFC and DC-DC stages are crucial for maintaining consistent output voltage for 10–20+ milliseconds during AC power interruptions. They allow the system to ride through short brownouts or transfer to UPS power without rebooting, essential for data integrity. Hold-up capacitors (on the bulk DC bus) store energy to sustain this functionality.

    The way caps have been chosen is to fit withing given dimension and yes they serve as both DC-link for PFC and hold-up during AC interruption. Some of the factor we have considered to reduce this size is higher DC link voltage. First one is although nominal intermediate is 800V but we selected bus voltage as 900V that provide higher energy storage since capacitor energy the function of square of voltage. Another is we are using current mode control for LLC that allows superior line/load regulation over direct frequency control so this allows us to allow DC bus go as low as 600V with similar performance.

    I hope that answered your question. Let me know if this makes sense.

    Regards,

    Sumit

  • 0 in reply to Sumit Patil1
    Prodigy 20 points

    Thank you for your detailed and helpful response, Sumit.

    May I ask one more question?

    I was wondering why electrolytic capacitors (12 in total, arranged as 6 per output) were used at the output stage instead of film capacitors.

    I assume this choice may be related to DC dynamic performance considerations — is that correct?

    In addition, I’m also curious about the hold-up strategy. It seems that the hold-up energy is implemented at the DC link stage rather than at the output.

    Since it would also be possible to add an energy buffer at the output stage, I was wondering if there is a specific reason for choosing the link stage instead.

    If this is something you’re able to comment on, I would greatly appreciate your insight.

    Best regards,
    Haneul

  • 0 in reply to ?? ?
    TI__Expert 5590 points

    Hello,

    We are using parallel combination of electrolytic cap and ceramic cap. Using this combination on an LLC converter output combines large energy storage with low-impedance high-frequency filtering. Electrolytic capacitors provide high capacitance values needed to store energy to assist with stringent load transient response requirement in server PSU application. It also filters low-mid frequency ripple. But electrolytic capacitors become inductive at higher frequencies, while ceramic capacitors maintain low impedance at these frequencies, effectively reducing high-frequency electromagnetic interference (EMI) while assisting with suppressing high-frequency ripple caused by LLC FET switching.

    We found this combination to be cost effective than film cap or ceramic cap alone.

    Again these cap combination selection is just to take care of load side and nothing to do with hold-up during AC power interruptions. Hold-up responsibility is solely on DC link caps, allowed DC link voltage variation and current mode control of LLC. 

    As you suggested, there are other method such as adding active/passive energy buffer at the output or at DC link itself but we chose above route to be able to fit the converter in those dimension required by PSU shelf.

    Regards,

    Sumit

  • 0 in reply to Sumit Patil1
    Prodigy 20 points

    Hello Sumit,

    Thank you very much for your detailed and kind explanation. I really appreciate your time and insight.

    I would like to ask a few additional questions if possible.

    1. Contact
    If possible, could you share an email address where I can reach you for further technical discussions?

    2. LLC operating mode
    Aside from the hold-up condition, does the LLC stage normally operate based on PFM (frequency modulation)?

    3. Electrolytic capacitor–less PSU concept
    Currently, we are researching a PSU architecture that eliminates electrolytic capacitors inside the PSU.

    According to the Diablo 400 specification:

    “Addition of system distributed holdup is acceptable, between the AC/DC PSU in the Diablo 400 rack and with the downstream DC/DC converter, located outside the rack.”

    Based on this concept, we are considering a design where the PSU itself does not include electrolytic capacitors, and the hold-up requirement is instead handled by external components such as a CBU or other rack-level energy storage.

    The goal is to increase PSU operating temperature capability and improve lifetime by removing electrolytic capacitors from the PSU module.

    I would appreciate your thoughts on whether this approach would be technically feasible for real server PSU designs.

    Thank you again for your helpful response.

    Best regards,
    Haneul

  • +1 in reply to ?? ?
    TI__Expert 5590 points

    Haneul,

    1. I have sent you the email associated with this account. Feel free to send questions there. I will try my best to answer those.

    2. LLC: Yes, its PFM (frequency modulation) but hybrid hysteretic control. You can refer the TI App Notes related to reference design: PMP41081

    3. Interesting concept, hold-up requirement can be outsourced to CBU/BBU and you can definitely reduce the electrolytic capacitor drastically but I am not entirely sure if you can entirely eliminate it considering PFC operation. But its definitely interesting approach and while pursuing this if you have any questions, feel free to reach out.

    Regards,

    Sumit