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TMS320F28P650DK: PMP23630 specification

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Prodigy 20 points

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: PMP23630

Dear TI Team,

I am very interested in the PMP23630 reference design and would like to ask a few questions regarding its documentation and technical implementation.

Could you please let me know when more detailed materials, such as the test report and full BOM, are expected to be publicly available? In the meantime, I have a technical question regarding the hold-up implementation. Based on the currently available documentation, I could not find any explicit description of hold-up functionality. From the board layout and available photos, it appears that the six large electrolytic capacitors connected in parallel may serve both as DC link capacitors and as hold-up energy storage. Additionally, I am wondering whether the LLC converter’s wide frequency operating range is intentionally utilized to support the hold-up duration.

I would greatly appreciate it if you could kindly confirm whether this understanding is correct, even if detailed documentation is not yet available. Thank you very much for your support.

Best regards,

Haneul 

  • 0
    TI__Expert 4790 points

    Hello,

    Documentation and firmware on this reference design is estimated to be available on ti.com by the end second quarter. Meanwhile I can answer your question. Hold-up capacity in server PSU PFC and DC-DC stages are crucial for maintaining consistent output voltage for 10–20+ milliseconds during AC power interruptions. They allow the system to ride through short brownouts or transfer to UPS power without rebooting, essential for data integrity. Hold-up capacitors (on the bulk DC bus) store energy to sustain this functionality.

    The way caps have been chosen is to fit withing given dimension and yes they serve as both DC-link for PFC and hold-up during AC interruption. Some of the factor we have considered to reduce this size is higher DC link voltage. First one is although nominal intermediate is 800V but we selected bus voltage as 900V that provide higher energy storage since capacitor energy the function of square of voltage. Another is we are using current mode control for LLC that allows superior line/load regulation over direct frequency control so this allows us to allow DC bus go as low as 600V with similar performance.

    I hope that answered your question. Let me know if this makes sense.

    Regards,

    Sumit