• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 82 subscribers
  • Views 188 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280039C: "How to start ePWM output at TBCTR = CMPA after clearing a software Trip Zone in up-down mode?"

Bhandavi Eduresapu
Prodigy 50 points

Part Number: TMS320F280039C

I am testing my application and facing an issue related to enabling and disabling PWM pulses on the GPIO pins.

My requirement is to disable the PWM output only at the GPIO pin level, while keeping the original PWM generation running internally.

In my initialization, I have configured Complimentary and Deadband between EPWM1A and EPWM1B. My Expectation is like, when I disable PWM I need both outputs to go LOW.

Initially, I tried using the AQCSFRC register to force the outputs. However, due to the inverter/deadband configuration, one output becomes HIGH and the other LOW, which is not acceptable for my application.

So instead, I started using a software Trip Zone to disable the PWM outputs.

The issue I am seeing now is that when I re-enable the PWM, the pulses start at a random point in the PWM cycle.

I would like the PWM to start exactly when TBCTR = CMPA.

The reason is that I am using center-aligned (up-down) mode, and my switching event is configured on the compare value. Therefore, starting the PWM at CMPA is important for correct operation.

My question is:

  • What is the best way to ensure that PWM output resumes exactly when TBCTR = CMPA after clearing the software trip?

  • Is there a recommended approach for cleanly enabling/disabling PWM outputs at the GPIO level while keeping the PWM module running internally?

Any suggestions or best practices would be helpful.


image.png

  • 0
    TI__Mastermind 23761 points

    Hi Bhandavi,

    It sounds like you would want to enable both the OST trip (as you have been doing) and the CBC trip and trip both conditions. When you re-enable the PWM, you only clear the OST trip and then the CBC trip will remain in effect until the next PWM cycle (which you can configure when the CBC trip gets cleared). Then it automatically clears itself. This helps make sure that the PWM starts at the defined position.

    Regards,

    Peter