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Original question:

F29H85X-SOM-EVM: Queries related to Linked ePWM

F29H85X-SOM-EVM: PWM linking for separate CPUs

Gökhan Bayraktar
Prodigy 160 points

Part Number: F29H85X-SOM-EVM

Hello,
I have a question about using PWM modules in Multi-core CPUs.

I want to configure PWM1 and PWM2 modules for CPU3 and PWM5 and PWM6 for CPU1.
In both CPU different power circuits are going to be controlled. Therefore, I need to separetely control PWM1&2 and PWM5&6.

In CPU3 I am controling a variable frequency topology so I want to link the TBPRD and CMPx registers of PWM1&2.

At the same time I want to link CMPx registers of PWM5&6 in CPU1 due to power topology of the circuit.

However, I assume that if I set EPWMXLINKCFG for PWM1,2,5 and 6 then all the PWMs are linked together. If I want to changed the TBPRD register for only PWM1 and PWM2 with below function

EPWM_setTimeBasePeriod(EPWM1XLINK_BASE, period_cnt);    

Then, TBPRD of PWM5 and 6 would change also which I absolutely don't want to do!!

If my assumption is correct, this multi-Core CPU architecture is not suitable for controlling different power topologies, at least in my case.

Am I missing something there?

Please guide me.

Thanks.



  • 0
    TI__Mastermind 42960 points

    Hello,

    Let me pass this post to our PWM expert.

    Regards,

    Joseph

  • 0 in reply to Joseph Casuga
    Prodigy 160 points

    Hello Joseph,

    Thank you.

    I have also an related question about this.

    The  HRPWM_isBaseValid function is defined such as:

    #ifdef DEBUG
    static inline bool HRPWM_isBaseValid(uint32_t base)
    {
        return(
               ((base & BASE_ADDR_MASK) == EPWM1_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM2_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM3_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM4_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM5_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM6_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM7_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM8_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM9_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM10_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM11_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM12_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM13_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM14_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM15_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM16_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM17_BASE_FRAME(0U)) ||
               ((base & BASE_ADDR_MASK) == EPWM18_BASE_FRAME(0U))
              );
    }

    As seen there is no XLINK region base such as "EPWM1XLINK_BASE". Therefore when I use 
    HRPWM_setTimeBasePeriod function, although I could control all linked PWM instances, the assert condition occurs which is defined inside the function . Thus, I need to disable debug Macro.
    I assume I am again missing something or there is something missing in SDK.

    Best regards,

    Gökhan
  • 0
    TI__Mastermind 18266 points

    Hi,

    ePWM individual module instances are mirrored to the XLINK region by configuring the SYSCTLs EPWMXLINKCFG Register bit.

    If multiple ePWM instances have this feature enabled, then any writes in the XLINK region of an ePWM instance reflects to all other ePWM instances that have the ePWM instances enabled in EPWMXLINKCFG Register bit.

    If the write occurs in the individual register memory space, then the update only reflects on that individual ePWM. There is no selective linking of specific pwm instances for specific registers.

    Thanks

  • 0 in reply to Prarthan Bhatt
    Prodigy 160 points

    Hello,

    So to confirm that, we can't separately link PWM modules for different CPUs then.

    Beside that, do you have a comment about the second question I asked?

    Thanks

  • 0 in reply to Gökhan Bayraktar
    TI__Mastermind 18266 points

    Hi,

    If lets say the in your below case : 

    PWM1 and PWM3 are allocated to CPU3, PWM5 and PWM6 for CPU1, and all PWM's 1,3,5,6 are enabled for XLINK.

    When write to PWM1 register, PWM3 will only be XLink'ed it wont cause write to PWM5 and PWM6 since they are allocated to CPU3, this is how the PWM XLink is architected so it should work for your case. Please try and let us know if you have any questions

    Gökhan Bayraktar said:
    PWM1 and PWM2 modules for CPU3
    Gökhan Bayraktar said:
    PWM1 and PWM2 modules for CPU3

    For the second question, if the XLINK base is not defined in API call that would be software bug. For now you can workaround the issue.

    Gökhan Bayraktar said:
    no XLINK region base such as "EPWM1XLINK_BASE". Therefore when I use 
    HRPWM_setTimeBasePeriod function, although I could control all linked PWM instances, the assert condition occurs which is defined inside the function . Thus, I need to disable debug Macro.

    Thanks