Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: C2000WARE
Hi champs,
I am asking this for our customer.
In C:\ti\c2000\C2000Ware_6_00_01_00\driverlib\f28p65x\driverlib
memcfg.h
memcfg.c
MEMCFG_SECT_LSX_ALL, MEMCFG_SECT_GSX_ALL, MEMCFG_SECT_MSGX_ALL do not seem to match the reigsters.
Take MEMCFG_SECT_LSX_ALL as an example, the definitions 0x010003FFU are shown below.
From Table 3-520. LSxINITDONE Register Field Descriptions of the TRM
the bit 10-31 are reserved, so qeustions:
- why is there the 1 in 0x010003FFU?
- Is this used on purpose?
- Is it reserved by TI use or is it a typo in the code?
//
// LSxRAM - Local shared RAM config
//
#define MEMCFG_SECT_LS0 0x01000001U //!< LS0 RAM
#define MEMCFG_SECT_LS1 0x01000002U //!< LS1 RAM
#define MEMCFG_SECT_LS2 0x01000004U //!< LS2 RAM
#define MEMCFG_SECT_LS3 0x01000008U //!< LS3 RAM
#define MEMCFG_SECT_LS4 0x01000010U //!< LS4 RAM
#define MEMCFG_SECT_LS5 0x01000020U //!< LS5 RAM
#define MEMCFG_SECT_LS6 0x01000040U //!< LS6 RAM
#define MEMCFG_SECT_LS7 0x01000080U //!< LS7 RAM
#define MEMCFG_SECT_LS8 0x01000100U //!< LS8 RAM
#define MEMCFG_SECT_LS9 0x01000200U //!< LS9 RAM
#define MEMCFG_SECT_LSX_ALL 0x010003FFU //!< All LS RAM
/*****************************************************************************
//
// MemCfg_initSections
//
//*****************************************************************************
void
MemCfg_initSections(uint32_t ramSections)
{
//
// Check the arguments.
//
ASSERT(((ramSections & MEMCFG_SECT_TYPE_MASK) == MEMCFG_SECT_TYPE_D) ||
((ramSections & MEMCFG_SECT_TYPE_MASK) == MEMCFG_SECT_TYPE_LS) ||
((ramSections & MEMCFG_SECT_TYPE_MASK) == MEMCFG_SECT_TYPE_GS) ||
((ramSections & MEMCFG_SECT_TYPE_MASK) == MEMCFG_SECT_TYPE_MSG) ||
(ramSections == MEMCFG_SECT_ALL));
//
// Set the bit in the various initialization registers that starts
// initialization.
//
EALLOW;
switch(ramSections & MEMCFG_SECT_TYPE_MASK)
{
case MEMCFG_SECT_TYPE_D:
HWREG(MEMCFG_BASE + MEMCFG_O_DXINIT) |= MEMCFG_SECT_NUM_MASK &
ramSections;
break;
case MEMCFG_SECT_TYPE_LS:
HWREG(MEMCFG_BASE + MEMCFG_O_LSXINIT) |= MEMCFG_SECT_NUM_MASK &
ramSections;
break;
case MEMCFG_SECT_TYPE_GS:
HWREG(MEMCFG_BASE + MEMCFG_O_GSXINIT) |= MEMCFG_SECT_NUM_MASK &
ramSections;
break;
case MEMCFG_SECT_TYPE_MSG:
HWREG(MEMCFG_BASE + MEMCFG_O_MSGXINIT) |= MEMCFG_SECT_NUM_MASK &
ramSections;
break;
case MEMCFG_SECT_TYPE_MASK:
//
// Initialize all sections.
//
HWREG(MEMCFG_BASE + MEMCFG_O_DXINIT) |= MEMCFG_SECT_NUM_MASK &
MEMCFG_SECT_DX_ALL;
HWREG(MEMCFG_BASE + MEMCFG_O_LSXINIT) |= MEMCFG_SECT_NUM_MASK &
MEMCFG_SECT_LSX_ALL;
HWREG(MEMCFG_BASE + MEMCFG_O_GSXINIT) |= MEMCFG_SECT_NUM_MASK &
MEMCFG_SECT_GSX_ALL;
HWREG(MEMCFG_BASE + MEMCFG_O_MSGXINIT) |= MEMCFG_SECT_NUM_MASK &
MEMCFG_SECT_MSGX_ALL;
break;
default:
//
// Do nothing. Invalid ramSections. Make sure you aren't OR-ing
// values for two different types of RAM.
//
break;
}
EDIS;
}