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TMS320F28388D: LWIP stuck in loop in ethernet.c

Part Number: TMS320F28388D
Other Parts Discussed in Thread: DP83822I

I am trying to write to CPU1 FLASH using ethernet. I am setting up the CM to its flash sectore with a modified enet_lwip.c from the TI project in communications->ethernet->third party->lwip. I modified this program to transfer data over IPC to the CPU. On the CPU1 side, I have the flash kernel example from TI that is modified to point to IPC instead of SCI to flash. The problem is, enet_lwip.c goes through its initialization and gets stuck here:

        //
        //Wait till the DMA is in suspended state or Waiting for receive
        //Packets
        //
         }while((processState !=
                        ETHERNET_DMA_DEBUG_STATUS0_TPS0_STOP) &&
                        (processState !=
                        ETHERNET_DMA_DEBUG_STATUS0_TPS0_SUSPND));
    }

I am not very familiar with CCS, and I am having trouble getting this going. I have tried a full initialization on the CPU1 side that sets up the GPIO for ethernet. I am currently looking into the DP83822i specifications to turn on RMII master mode because I believe the ethernet clock is never executing. I will upload my modules into this forum. 

Also, on a similar note, the TI project has some silent include errors referencing the compiler. This may contribute to the issue I am having, but I don't know how to change it. Like I said, I am inexperienced with CCS (using 20.2.0). The errors tell me that some of the TI code are legacy TI intrinsic and is not supported in clang compilers. the only compiler I use is the TI v20.2.6.LTS, and I can't find a legacy one. If anyone can help in this matter that would be much appreciated. Thanks.

flash_kernel_c28x_cm_ex1_boot_cpu1.c 

 I'm not sure if anyone can really help, I know it's a lot of code and some dependincies are missing. but I figured I'd give it a shot. As I said before, I'm new to CCS and everything related to these topics (lwip, flashing, etc.)


  • Hi,

    Can u rebuild the driverlib_cm to confirm whether code is stuck on the line mentioned above or Ethernet_resetModule?
    If it is stuck on Ethernet reset module, then it is because of the clock issue.

    TMS320F28388D control card does not support RMII mode with out external connection. Even if PHY run as Master, due to lack of connection to the ENET_RMII_CLK, Ethernet module wont under go software reset and stucks in the loop.