Part Number: TMS320F2800133
Other Parts Discussed in Thread: TMS320F2800132
Dear Sir/Madam,
I want to convert channel A5/GOPI242 of TMS320F2800132 but it is not working
Please check the following code and suggest
// Included Files
//
#include "f28x_project.h"
#include "f280013x_device.h"
#define STAND_ALONE_EPWM
#define CPUTIMER_PERIOD 119999
#define EPWMCLK_MHZ 60.0
#define EPWM_UPMODE 1
#define EPWM_UPDOWNMODE 0
#define EPWM_MODESEL EPWM_UPDOWNMODE
#define TIMER_CONTROL_VARIABLE
#define MAIN_RELAY_TIME_ms 500 // 500ms
#define LED_TOGGLE_TIME_ms 1000 // 1 Sec
#define DEADBAND_NS 24 //Dead Band Coming is ~400ns 85 // Dead band Expected --> 500 nSec
#define PERIOD_US 2999 // 50microSec //59999--> 1kHz
#define PERIOD_US_UP_DOWN 1500
/* Commented this Section - 9/11/2025 */
//#define COMP__AU 150//90 //--> 1.5 microseconds//150 //--> 2.5 microSeconds width lower edge
//#define COMP__BU 2879//2699//2940 //--> 1 microSeconds//2879 //2699 // --> 2 microseconds width upper edge
//#define COMP__AUD 1440//90 //--> 1.5 microseconds//150 //--> 2.5 microSeconds width lower edge
//#define COMP__BUD 60//2699//2940 //--> 1 microSeconds//2879 //2699 // --> 2 microseconds width upper edge
#define TWOMICRO 120
#define COMP__AU 1370 //(1500-TWOMICRO-DB/2)
#define COMP__BU 1490
#define COMP__BD 1490
#define COMP__AD 1370
#define COMP__A 1370
#define COMP__B 1490
/* New Changes Date- 09/11/2025*/
#if EPWM_MODESEL == EPWM_UPMODE
/* EPWM Macros that can be tuned */
#define db_tuning 0.5 // Clock Time in micro Seconds
/* end */
#define time_A 2
#define time_B 48
#define DEADBAND_DELTA(db_tuning) ((db_tuning/50)*2999)
#define DEADBAND_NS 26 //Dead Band Coming is ~400ns 85 // Dead band Expected --> 500 nSec
#define CAL_COM_A(time_A) ((time_A/50)*PERIOD_US)
#define CAL_COM_B(time_B) ((time_B/50)*PERIOD_US)
#define COMP__A (CAL_COM_A(time_A)+DEADBAND_DELTA(db_tuning))//90+DEADBAND_DELTA(x)//150//90 //--> 1.5 microseconds//150 //--> 2.5 microSeconds width lower edge
#define COMP__B (CAL_COM_B(time_B))//2879//2699//2940 //--> 1 microSeconds//2879 //2699 // --> 2 microseconds width upper edge
#endif
#if EPWM_MODESEL == EPWM_UPDOWNMODE
//#define CAL_COM_A(time_A) ((time_A/50)*PERIOD_US_UP_DOWN)
//#define CAL_COM_B(time_B) ((time_B/50)*PERIOD_US_UP_DOWN)
//#define COMP__A (CAL_COM_A(time_A))//60
//#define COMP__B (CAL_COM_A(time_B))//1440
#endif
/* End new Changes */
#define NTCTemp 0x00 // A0 ; 8K-95deg --12k-80deg
#define Vphase 0x01 // A1 ; ADCA channel 1 // R54
#define Vneutral 0x03 // A3/C5 ; ADCA Channel 3 // R40 ??
#define HVDCFBK 0x06 // A6 ; ADCA Channel 6 // R35 ??
#define I_fbk 0x0F // A15 ; ADCA channel 15 // R50
#define I_ac 0x05 // A5 ; ADCA Channel 5 // R96
#define ADCgains 0.005964
#define ADVoltageGain (553)
#define DCVoltageGain 608.8
#define CrntGain 0.1
#define XMRGain 4.28
#define Diodedrop 3
#define Rseries 600000
#define Rx 3600
#define ADCCounts 4095
#define RESULTS_BUFFER_SIZE 256
#define GPIO_242_GPIO242 0x01C80400U
#define FRMVER_REV 0X101000
//
// Main
//
unsigned int i = 0 ;
unsigned int relay_state = 0 ;
unsigned long int ledBlink = 0 ;
volatile unsigned int pwmDelay = 0 ;
unsigned int pwmonFlag = 0 ;
unsigned int LedD16OnDelay = 0 ;
unsigned int f__500ms = 0 ;
unsigned int f__100ms = 0 ;
unsigned int f__10ms = 0 ;
unsigned int f__2ms = 0 ;
unsigned int f_LEDToggle = 0 ;
unsigned int led_Counter = 0 ;
float Source_vin_adc_pin_Vphase ;
float Source_vin_adc_pin_Vneutral ;
float Source_vin_adc_pin_HVDC ;
float Source_vin_adc_pin_I_ac ;
float Source_vin_adc_pin_Ifbk ;
uint32_t Vphase_Counts ;
uint32_t Vneutral_Counts ;
uint16_t HVDC_Counts ;
uint16_t I_ac_Counts ;
uint16_t I_fbk_Counts ;
uint32_t NTCTemp_Counts ;
int32_t VLine_Counts ;
int32_t VLine_Counts_Rect ;
uint32_t Vphase_value ;
uint32_t ACPhaseV=0;
uint32_t Vphase_adcSum ;
uint32_t Vneutral_value ;
uint32_t I_ak_value ;
uint32_t HVDC_value ;
uint32_t I_fbk_value ;
uint32_t adcAResults_Vphase[RESULTS_BUFFER_SIZE] ; // Buffer for results
uint32_t adcAResults_Vneutral[RESULTS_BUFFER_SIZE] ;
uint32_t adcAResults_HVDCFBK[RESULTS_BUFFER_SIZE] ;
uint32_t adcAResults_I_fbk[RESULTS_BUFFER_SIZE] ;
uint32_t adcAResults_I_ac[RESULTS_BUFFER_SIZE] ;
uint32_t VACAdcSum=0;
uint32_t NTCTempSum=0;
uint32_t NTCTempAvg=0;
uint32_t VACSampleCount=0;
uint32_t VAC_AvgVal=0;
uint32_t Vphase_CountsSum=0;
uint32_t Vneutral_CountsSum=0;
uint32_t Vphase_Avg=0;
uint32_t Vphase_AvgVolt=0;
uint32_t VNeutral_Avg=0;
uint32_t VNeutral_AvgVolt=0;
uint16_t index_Vphase ;
uint16_t index_Vneutral ;
uint16_t index_HVDC ;
uint16_t ntcbasedActionFlag=0;
uint16_t ACAbnFlag=0;
unsigned char msg[]="Phase V : XXX";
uint16_t ch1,ch2,ch3,ch4;
uint16_t charAddr=0;
typedef enum
{
GPIO_ANALOG_DISABLED, //!< Pin is in digital mode
GPIO_ANALOG_ENABLED //!< Pin is in analog mode
} GPIO_AnalogMode;
/* User Defined API's*/
void Gpio_ePwm(void) ;
void ClockConfig(void) ;
void init_ePWM3(void) ;
void start_ePWM(void) ;
void mainRelay_On(void) ;
void user_Interrupt_Congiguration(void) ;
void user_Timer_PeriodSet(void) ;
void gpioADC_Mux(void) ;
void initADC(void) ;
void initADCSOC(void) ;
void init_adc_SOC_trigger(void) ;
void measurement(void) ;
//
// Function Prototypes
//
__interrupt void cpuTimer0ISR(void) ;
__interrupt void cpuTimer1ISR(void) ;
__interrupt void cpuTimer2ISR(void) ;
__interrupt void adcA1ISR(void) ;
uint16_t index_I_ac ; // Index into result buffer
volatile uint16_t bufferFull ; // Flag to indicate buffer is full
uint16_t GPIO33Flag=0;
uint16_t txMsgFlag=0;
uint32_t txdataTimeDelay=0;
void transmitSCIAMessage(unsigned char * msg);
void initSCIAFIFO(void);
void initSCIAEchoback(void);
void main(void)
{
InitSysCtrl();
InitGpio();
EALLOW;
// LED 1
GpioCtrlRegs.GPBGMUX1.bit.GPIO32 = 1;
GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
GpioCtrlRegs.GPAGMUX1.bit.GPIO12 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO12 = 1;
// LED 2
GpioCtrlRegs.GPBGMUX1.bit.GPIO33 = 1;
GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 0;
GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO33 = 1;
EDIS;
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
InitPieVectTable();
GpioDataRegs.GPASET.bit.GPIO12 = 1; // Set the bit high
GpioDataRegs.GPBSET.bit.GPIO33 = 1; // Set the bit high
user_Interrupt_Congiguration() ; // Configure the CPU Timer 1 Interrupt
EALLOW;
// PieVectTable.ADCA1_INT = &adcA1ISR; // Function for ADCA interrupt 1
EDIS;
//
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
//
EINT;
ERTM;
GPIO_SetupPinMux(3, GPIO_MUX_CPU1, 9);
GPIO_SetupPinOptions(3, GPIO_INPUT, GPIO_PUSHPULL);
GPIO_SetupPinMux(2, GPIO_MUX_CPU1, 9);
GPIO_SetupPinOptions(2, GPIO_OUTPUT, GPIO_ASYNC);
initSCIAFIFO(); // Initialize the SCI FIFO
initSCIAEchoback();
/* Step 1 : Assigns GPIO 227 Pin 20 DRIVEB --> EPWMB and GPIO 230 Pin 21 DRIVEA --> EPWM B*/
Gpio_ePwm() ;
/* Step 2 : Configure EPWM Clock, Disable TIME BASE CLOCK for Setting up the Registers*/
ClockConfig() ;
/* Step 3 : Configure Time- Base , Capture Compare , Action Qualifier Blocks*/
init_ePWM3() ;
/* Step 4 : Enable Time BASE CLOCk and start the ePWM Module*/
start_ePWM() ;
gpioADC_Mux() ;
/* Step 5 : ADC Power up Sequence */
initADC() ;
/* Step 6 : ADC Channel Configurations */
initADCSOC() ;
/* Step 7 : Configure the Event Based SOC Trigger */
init_adc_SOC_trigger() ;
// Enable global Interrupts and higher priority real-time debug events:
//
IER |= M_INT1 ; // Enable group 1 interrupts
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
/*Enable Pie Interrupts */
// PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // ADCA 1
/*Initialize the Buffer*/
for(index_Vphase = 0; index_Vphase < RESULTS_BUFFER_SIZE; index_Vphase++)
{
adcAResults_Vphase[index_Vphase] = 0 ;
adcAResults_Vneutral[index_Vphase] = 0 ;
adcAResults_HVDCFBK[index_Vphase] = 0 ;
adcAResults_I_fbk[index_Vphase] = 0 ;
adcAResults_I_ac[index_Vphase] = 0 ;
}
index_Vphase = 0 ;
index_Vneutral = 0 ;
index_HVDC = 0 ;
bufferFull = 0 ;
/* Application Step 01 - Switch on the Relay*/
// GpioDataRegs.GPACLEAR.bit.GPIO12 = 1 ; // Main Relay off
while(1)
{
ledBlink++;
if((ntcbasedActionFlag==0)&&(ACAbnFlag==0))
{
if(ledBlink<250000)
{
GpioDataRegs.GPBSET.bit.GPIO32 = 1;
}
if(ledBlink>250000)
{
GpioDataRegs.GPBCLEAR.bit.GPIO32 = 1;
}
}
if(ledBlink>500000)
{
ledBlink=0;
}
txdataTimeDelay++;
if(txdataTimeDelay>=500000)
{
// ACPhaseV=241;
ch1=(Vphase_Avg/100);
ch2=Vphase_Avg-(ch1*100);
ch3=ch2/10;
ch2=ch2%10;
msg[10]=(ch1)+0x30;
msg[11]=ch3+0x30;
msg[12]=ch2+0x30;
msg[13]='-';
//Neutral Count
charAddr=14;
ch1=(VNeutral_AvgVolt/100);
ch2=VNeutral_AvgVolt-(ch1*100);
ch3=ch2/10;
ch2=ch2%10;
msg[charAddr++]=(ch1)+0x30;
msg[charAddr++]=ch3+0x30;
msg[charAddr++]=ch2+0x30;
msg[charAddr++]='-';
//ACPhase
ch1=(ACPhaseV/100);
ch2=ACPhaseV-(ch1*100);
ch3=ch2/10;
ch2=ch2%10;
msg[charAddr++]=(ch1)+0x30;
msg[charAddr++]=ch3+0x30;
msg[charAddr++]=ch2+0x30;
//ntc count
ch1=(NTCTempAvg/1000);
ch2=NTCTempAvg-(ch1*1000);
ch3=ch2/100;
ch4=ch2-(ch3*100);
ch2=ch4%10;
ch4=ch4%10;
msg[charAddr++]='N';
msg[charAddr++]=(ch1)+0x30;
msg[charAddr++]=ch3+0x30;
msg[charAddr++]=ch2+0x30;
msg[charAddr++]=ch4+0x30;
msg[charAddr]=0;
transmitSCIAMessage(msg);
txdataTimeDelay=0;
}
if((pwmDelay>=100)&&(pwmonFlag==0))
{
start_ePWM();
pwmonFlag=1;
}
if(pwmDelay>=100)
pwmDelay=100;
if((LedD16OnDelay>=500)&&(GPIO33Flag==0))
{
// GpioDataRegs.GPBCLEAR.bit.GPIO33 = 1;
GPIO33Flag=1;
}
if(LedD16OnDelay>=500)
{
LedD16OnDelay=500;
}
// while(!bufferFull)
// {
// }
// bufferFull = 0; //clear the buffer full flag
// if(relay_state == 0)
// {
// mainRelay_On();
// }
// measurement();
//Temp based action
if((NTCTempAvg>=3600) &&(ntcbasedActionFlag==0))
{
ntcbasedActionFlag=1;
}
if((NTCTempAvg<3300) &&(ntcbasedActionFlag==1))
{
ntcbasedActionFlag=0;
}
if((ACAbnFlag==0)&&(ACPhaseV>=260))
{
ACAbnFlag=1;
}
if((ACAbnFlag==0)&&(ACPhaseV<160))
{
ACAbnFlag=1;
}
if((ACAbnFlag==1)&(ACPhaseV>=165)&&(ACPhaseV<=255))
{
ACAbnFlag=0;
}
if((ACAbnFlag==1)||(ntcbasedActionFlag==1))
{
GpioDataRegs.GPBSET.bit.GPIO32 = 1;
//PWM ShutDown
EPwm3Regs.AQCSFRC.bit.CSFA = 1;
EPwm3Regs.AQCSFRC.bit.CSFB = 1;
}
if((ACAbnFlag==0)&&(ntcbasedActionFlag==0))
{
EPwm3Regs.AQCSFRC.bit.CSFA = 0;
EPwm3Regs.AQCSFRC.bit.CSFB = 0;
}
}
}
/*GPIO Muxing Channels*/
void Gpio_ePwm(void)
{
EALLOW;
/*GPIO Muxing*/
GpioCtrlRegs.GPHMUX1.bit.GPIO227 = 3;
GpioCtrlRegs.GPHMUX1.bit.GPIO230 = 3;
GpioCtrlRegs.GPHDIR.bit.GPIO227 = 1; // output
GpioCtrlRegs.GPHDIR.bit.GPIO230 = 1; // output
GpioCtrlRegs.GPHPUD.bit.GPIO227 = 1; // Enable internal pull-up (0=enabled, 1=disabled)
GpioCtrlRegs.GPHQSEL1.bit.GPIO227 = 0; // Qualification = sync to sysclk
GpioCtrlRegs.GPHPUD.bit.GPIO230 = 1; // Enable internal pull-up (0=enabled, 1=disabled)
GpioCtrlRegs.GPHQSEL1.bit.GPIO230 = 0; // Qualification = sync to sysclk
EDIS;
}
/* ePWM Clock initialization*/
void ClockConfig(void)
{
/*
The TBCLKSYNC bit in the peripheral clock enable registers allows all users to globally synchronize all enabled
ePWM modules to the time-base clock (TBCLK). When set, all enabled ePWM module clocks are started with
the first rising edge of TBCLK aligned. For synchronized TBCLKs, the prescalers for each ePWM module must
be set identically.
The proper procedure for enabling ePWM clocks is as follows:
1. Enable ePWM module clocks in the PCLKCRx register
2. Set TBCLKSYNC= 0
3. Configure ePWM modules
4. Set TBCLKSYNC= 1
*/
EALLOW;
CpuSysRegs.PCLKCR2.bit.EPWM3 = 1; // Enable EPWM3 Clock
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Disable Time Base Clock
EDIS;
}
void start_ePWM(void)
{
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Disable Time Base Clock
EDIS;
}
/* ePWM 3 Configurations for TB , AQ and CC block */
void init_ePWM3(void)
{
#if EPWM_MODESEL== EPWM_UPMODE
// Time Base Block Congigurations
EPwm3Regs.TBPRD = PERIOD_US ; // Period register → sets freq
EPwm3Regs.TBCTL.bit.CTRMODE = 0 ; // Up count mode
// Duty Set EPWM3A and EPWM3B
EPwm3Regs.CMPA.bit.CMPA = COMP__A ;
EPwm3Regs.CMPB.bit.CMPB = COMP__B ;
// Set the Phase sections
EPwm3Regs.TBPHS.bit.TBPHS = 0 ; // Set as master ; Phase = 0
EPwm3Regs.TBCTR = 0 ; // Set Time Base counter to 0
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 1 ; // Clock divide = /2
EPwm3Regs.TBCTL.bit.CLKDIV = 0 ; // Clock divide = /1
#ifdef STAND_ALONE_EPWM
EPwm3Regs.EPWMSYNCINSEL.bit.SEL = 0 ; // Disable Sychronizations
EPwm3Regs.TBCTL.bit.PHSEN = 0 ; // Disable phase loading
#endif
// Counter Compare Block Configurations
EPwm3Regs.CMPCTL.bit.SHDWAMODE = 0 ; // Double Buffer via CPU Shadow Register
EPwm3Regs.CMPCTL.bit.SHDWBMODE = 0 ; // Double Buffer via CPU Shadow Register
EPwm3Regs.CMPCTL.bit.LOADAMODE = 0 ; // Load to Active Register when CTR = 0
EPwm3Regs.CMPCTL.bit.LOADBMODE = 0 ; // Load to Active Register when CTR = 0
// Action Qualifiers Block Configurations
EPwm3Regs.AQCTLA.all = 0 ;
EPwm3Regs.AQCTLB.all = 0 ;
EPwm3Regs.AQCTLA.bit.CAU = 1 ; // Clear EPWM 3A When CTR = CMPA while Up Count.
EPwm3Regs.AQCTLA.bit.ZRO = 2 ; // Set High EPWM 3A when CTR = 0 .Clear EPWM 3B when CTR = Period .
EPwm3Regs.AQCTLB.bit.CBU = 2 ; // Set High EPWM 3B When CTR = CMPA while Up Count.
EPwm3Regs.AQCTLB.bit.PRD = 1 ; // Set High EPWM 3B when CTR = 0 .
/* Dead Band Configuration */
EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL ; // 0x00 --> EPWMA is the source for both the delays.
EPwm3Regs.DBCTL.bit.OUT_MODE = DBA_ENABLE ; // 0x2--> Enable Dead band for EPWM3A.
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HI ; // 0x0 --> No Complementry .
EPwm3Regs.DBRED.all = DEADBAND_NS ; // [Number of Ticks = TBCLK/Deadband Time]
EPwm3Regs.DBFED.all = DEADBAND_NS ;
/* Shadow behavior: keep shadows enabled or disabled per your design. We used load on CTR=0 above. */
#endif
#if EPWM_MODESEL == EPWM_UPDOWNMODE
// Time Base Block Congigurations
EPwm3Regs.TBPRD = PERIOD_US_UP_DOWN ; // Period register → sets freq
EPwm3Regs.TBCTL.bit.CTRMODE = 2 ; // Up-Down count mode
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 1 ; // Clock divide = /2
EPwm3Regs.TBCTL.bit.CLKDIV = 0 ; // Clock divide = /1
#ifdef STAND_ALONE_EPWM
EPwm3Regs.EPWMSYNCINSEL.bit.SEL = 0 ; // Disable Sychronizations
EPwm3Regs.TBCTL.bit.PHSEN = 0 ; // Disable phase loading
#endif
// Counter Compare Block Configurations
EPwm3Regs.CMPCTL.bit.SHDWAMODE = 0 ; // Double Buffer via CPU Shadow Register
EPwm3Regs.CMPCTL.bit.SHDWBMODE = 0 ; // Double Buffer via CPU Shadow Register
EPwm3Regs.CMPCTL.bit.LOADAMODE = 0 ; // Load to Active Register when CTR = 0
EPwm3Regs.CMPCTL.bit.LOADBMODE = 0 ; // Load to Active Register when CTR = 0
// Action Qualifiers Block Configurations
EPwm3Regs.CMPA.bit.CMPA = COMP__A ; // 50% duty for A
EPwm3Regs.CMPB.bit.CMPB = COMP__B ; // 25% duty for B
EPwm3Regs.AQCTLA.bit.CAU = 2 ; // Set High EPWM 3A When CTR = CMPA while Up Count.
EPwm3Regs.AQCTLA.bit.CAD = 0 ; // Clear EPWM 3A When CTR = CMPA while Down Count.
EPwm3Regs.AQCTLA.bit.CBU = 1 ;
EPwm3Regs.AQCTLA.bit.CBD = 0 ;
EPwm3Regs.AQCTLB.bit.CAU = 0 ; // Clear EPWM 3B When CTR = CMPB while Up Count.
EPwm3Regs.AQCTLB.bit.CBU = 0 ; // Set High EPWM 3B When CTR = CMPB while Down Count.
EPwm3Regs.AQCTLB.bit.CBD = 2 ;
EPwm3Regs.AQCTLB.bit.CAD = 1 ;
// Set the Compare Values (Duty Cycle)
#endif
}
void user_Interrupt_Congiguration(void)
{
// Map ISR functions
//
EALLOW;
PieVectTable.TIMER0_INT = &cpuTimer0ISR;
EDIS;
// Initialize the Device Peripheral. For this example, only initialize the
// Cpu Timers.
InitCpuTimers();
// Configure CPU-Timer 0, 1, and 2 to interrupt every second:
// 100MHz CPU Freq, 1 second Period (in uSeconds)
//ConfigCpuTimer(&CpuTimer0, 100, 1000);
ConfigCpuTimer(&CpuTimer0, 120, 10);
//ConfigCpuTimer(&CpuTimer2, 100, 1000);
//
// To ensure precise timing, use write-only instructions to write to the
// entire register. Therefore, if any of the configuration bits are changed
// in ConfigCpuTimer and InitCpuTimers, the below settings must also be
// be updated.
CpuTimer0Regs.TCR.all = 0x4000;
//
// Enable CPU int1 which is connected to CPU-Timer 0, CPU int13
// which is connected to CPU-Timer 1, and CPU int 14, which is connected
// to CPU-Timer 2
//
IER |= M_INT1;
// IER |= M_INT13;
//IER |= M_INT14;
//
// Enable TINT0 in the PIE: Group 1 interrupt 7
//
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
}
// For Timer 0
void user_Timer_PeriodSet(void)
{
//Timer->RegsAddr->PRD.all = temp - 1;
CpuTimer0Regs.PRD.all = CPUTIMER_PERIOD;
//
// Set pre-scale counter to divide by 1 (SYSCLKOUT)
//
CpuTimer0Regs.TPR.all = 0;
CpuTimer0Regs.TPRH.all = 0;
CpuTimer0Regs.TCR.bit.TSS = 1;
//
// 1 = reload timer
//
CpuTimer0Regs.TCR.bit.TRB = 1;
CpuTimer0Regs.TCR.bit.SOFT = 1;
CpuTimer0Regs.TCR.bit.FREE = 0;
CpuTimer0Regs.TCR.bit.TIE = 1;
}
/*Function to Switch on the Relay after 2 Seconds after power on*/
void mainRelay_On(void)
{
if(f__500ms == 1 )
{
relay_state = 1 ;
GpioDataRegs.GPASET.bit.GPIO12 = 1 ; // Main Relay on
}
}
/*initADC - Function to configure and power up ADCA.*/
void initADC(void)
{
//
// Setup VREF as internal
//
SetVREF(ADC_ADCA, ADC_INTERNAL, ADC_VREF3P3);
EALLOW;
//
// Set ADCCLK divider to /4
//
AdcaRegs.ADCCTL2.bit.PRESCALE = 6;
//
// Set pulse positions to late
//
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
//
// Power up the ADC and then delay for 1 ms
//
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
EDIS;
DELAY_US(1000);
}
/*Function to configure ADCA's SOC0 to be triggered by ePWM3.*/
void initADCSOC(void)
{
//
// Select the channels to convert and the end of conversion flag
//
EALLOW;
// 0:A0 1:A1 2:A2 3:A3
// 4:A4 5:A5 6:A6 7:A7
// 8:A8 9:A9 A:A10 B:A11
// C:A12 D:A13 E:A14 F:A15
AdcaRegs.ADCSOC7CTL.bit.CHSEL = Vphase ;
AdcaRegs.ADCSOC8CTL.bit.CHSEL = Vneutral ;//Vneutral
AdcaRegs.ADCSOC9CTL.bit.CHSEL = NTCTemp ;//HVDCFBK
AdcaRegs.ADCSOC10CTL.bit.CHSEL = I_fbk ;
AdcaRegs.ADCSOC11CTL.bit.CHSEL = I_ac ;
/*Burst Mode Configuration- SOC0, SOC1 , SOC 2 and SOC 3*/
AdcaRegs.ADCBURSTCTL.bit.BURSTEN = 1 ;// Enable Burst Mode
AdcaRegs.ADCBURSTCTL.bit.BURSTSIZE = 4 ;// 5 SOC's are converted in One Time
AdcaRegs.ADCBURSTCTL.bit.BURSTTRIGSEL = 9 ;//09h BURSTTRIG9 - ePWM3, ADCSOCA
AdcaRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0xC ;//Setting burst enabled from SOC0 to SOC11
AdcaRegs.ADCSOC7CTL.bit.ACQPS = 10 ;// Sample window is 10 SYSCLK cycles
AdcaRegs.ADCSOC8CTL.bit.ACQPS = 10 ;// Sample window is 10 SYSCLK cycles
AdcaRegs.ADCSOC9CTL.bit.ACQPS = 10 ;// Sample window is 10 SYSCLK cycles
AdcaRegs.ADCSOC10CTL.bit.ACQPS = 10 ;// Sample window is 10 SYSCLK cycles
AdcaRegs.ADCSOC11CTL.bit.ACQPS = 10 ;
AdcaRegs.ADCSOC7CTL.bit.TRIGSEL = 0 ;// 09h ADCTRIG9 - ePWM3, ADCSOCA
AdcaRegs.ADCSOC8CTL.bit.TRIGSEL = 0 ;// 09h ADCTRIG9 - ePWM3, ADCSOCA
AdcaRegs.ADCSOC9CTL.bit.TRIGSEL = 0 ;// 09h ADCTRIG9 - ePWM3, ADCSOCA
AdcaRegs.ADCSOC10CTL.bit.TRIGSEL = 0 ;// 09h ADCTRIG9 - ePWM3, ADCSOCA
AdcaRegs.ADCSOC11CTL.bit.TRIGSEL = 0 ;
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1 ;// Enable INT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0xB ;// End of EOC11 will set INT1 flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1 ;// Make sure INT1 flag is cleared
EDIS;
}
/*Function to configure ePWM1 to generate the SOC.*/
void init_adc_SOC_trigger(void)
{
EALLOW;
EPwm3Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm3Regs.ETSEL.bit.SOCASEL = 1; // Select SOC on up-count CMP B
EPwm3Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EDIS;
}
/*adcA1ISR - ADC A Interrupt 1 ISR*/
__interrupt void adcA1ISR(void)
{
//
// Add the latest result to the buffer
// ADCRESULT0 is the result register of SOC0
adcAResults_Vphase[index_Vphase++] = AdcaResultRegs.ADCRESULT0;
adcAResults_Vneutral[index_Vneutral++] = AdcaResultRegs.ADCRESULT1;
adcAResults_HVDCFBK[index_HVDC++] = AdcaResultRegs.ADCRESULT2;
adcAResults_I_fbk[index_Vphase++] = AdcaResultRegs.ADCRESULT3;
adcAResults_I_ac[index_Vphase++] = AdcaResultRegs.ADCRESULT4;
//
// Set the bufferFull flag if the buffer is full
//
if(RESULTS_BUFFER_SIZE <= index_Vphase)
{
index_Vphase = 0;
index_Vneutral = 0;
index_HVDC = 0;
bufferFull = 1;
}
//
// Clear the interrupt flag
//
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
//
// Check if overflow has occurred
//
if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
{
AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
//
// Acknowledge the interrupt
//
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/*Measurement - ADC Channels */
void measurement(void)
{
Vphase_Counts = (AdcaResultRegs.ADCRESULT7) ;
Vneutral_Counts = (AdcaResultRegs.ADCRESULT8) ;
// HVDC_Counts = (AdcaResultRegs.ADCRESULT9) ;
NTCTemp_Counts = (AdcaResultRegs.ADCRESULT9) ;
I_ac_Counts = (AdcaResultRegs.ADCRESULT10) ;
I_fbk_Counts = (AdcaResultRegs.ADCRESULT11) ;
VLine_Counts = Vphase_Counts-Vneutral_Counts;
if(VLine_Counts < 0)
VLine_Counts_Rect = -VLine_Counts;
else
VLine_Counts_Rect = VLine_Counts;
VACAdcSum=VACAdcSum+VLine_Counts_Rect;
NTCTempSum = NTCTempSum + NTCTemp_Counts;
Vphase_CountsSum=Vphase_CountsSum+Vphase_Counts;
Vneutral_CountsSum=Vneutral_CountsSum+Vneutral_Counts;
VACSampleCount++;
if(VACSampleCount>=10000)
{
Vphase_Avg = Vphase_CountsSum/VACSampleCount;
Vphase_AvgVolt = (ADVoltageGain*Vphase_Avg);
Vphase_AvgVolt = Vphase_AvgVolt/4096;
VNeutral_Avg = Vneutral_CountsSum/VACSampleCount;
VNeutral_AvgVolt = (ADVoltageGain*VNeutral_Avg);
VNeutral_AvgVolt = VNeutral_AvgVolt/4096;
VAC_AvgVal=VACAdcSum/VACSampleCount;
Vphase_value=(ADVoltageGain*VAC_AvgVal);
Vphase_value = Vphase_value/4096;
ACPhaseV=1.11*Vphase_value;
ACPhaseV=ACPhaseV+Diodedrop;
NTCTempAvg = NTCTempSum/VACSampleCount;
VACSampleCount=0;
VACAdcSum=0;
NTCTempSum=0;
Vneutral_CountsSum=0;
Vphase_CountsSum=0;
}
}
void gpioADC_Mux(void)
{
EALLOW;
// GPIO analog Mode selection
// Vneutral
GpioCtrlRegs.GPHAMSEL.bit.GPIO242 = 1 ; // Enable the analog mode
// HVDC
GpioCtrlRegs.GPHAMSEL.bit.GPIO228 = 1 ; // Enable the analog mode
EDIS;
}
//
// cpuTimer1ISR - CPU Timer1 ISR with interrupt counter
//
__interrupt void cpuTimer0ISR(void)
{
//
// The CPU acknowledges the interrupt
//
CpuTimer1.InterruptCount++;
led_Counter++;
pwmDelay++;
LedD16OnDelay++;
if(relay_state == 0) // check the flag setting condition
{
if(CpuTimer1.InterruptCount == MAIN_RELAY_TIME_ms)
{
f__500ms = 1 ; // Set the timeer flag
}
}
if(led_Counter == LED_TOGGLE_TIME_ms)
{
f_LEDToggle = 1 ;
led_Counter = 0 ;
GpioDataRegs.GPBTOGGLE.bit.GPIO33 = 1 ;
}else
{
f_LEDToggle = 0 ;
}
measurement();
AdcaRegs.ADCSOCFRC1.all=0x07FF;
PieCtrlRegs.PIEACK.all=PIEACK_GROUP1;
#if 0
95deg 80deg
3.3 3.3
8000 12000
100000 100000
3.055555556 2.946428571
3792.592593 3657.142857
#endif
}
//
// End of File
//
void initSCIAEchoback(void)
{
//
// Note: Clocks were turned on to the SCIA peripheral
// in the InitSysCtrl() function
//
SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback
// No parity, 8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL2.all = 0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL1.bit.RXENA=1;
SciaRegs.SCICTL1.bit.TXENA=1;
SciaRegs.SCICTL2.all = 0x0003;
SciaRegs.SCICTL2.bit.TXINTENA = 1;
SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
//
// SCIA at 19200 baud
// @LSPCLK = 25 MHz (100 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x44.
//
SciaRegs.SCIHBAUD.all = 0x000;
SciaRegs.SCILBAUD.all = 0x00C2;
SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
}
void transmitSCIAChar(uint16_t a)
{
while (SciaRegs.SCIFFTX.bit.TXFFST != 0)
{
}
SciaRegs.SCITXBUF.all = a;
}
//
// transmitSCIAMessage - Transmit message via SCIA
//
void transmitSCIAMessage(unsigned char * msg)
{
int i;
i = 0;
while(msg[i] != '\0')
{
transmitSCIAChar(msg[i]);
i++;
}
}
//
// initSCIAFIFO - Initialize the SCI FIFO
//
void initSCIAFIFO(void)
{
SciaRegs.SCIFFTX.all = 0xE040;
SciaRegs.SCIFFRX.all = 0x2044;
SciaRegs.SCIFFCT.all = 0x0;
}
