This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280039C: Troubles using ADC in F280039C

Part Number: TMS320F280039C
Other Parts Discussed in Thread: SYSCONFIG

Hello,
I am using a texas microcontroller for the firt time and I'm having trouble understanding the datasheet and the sysconfig. For what I understod I can have 3.3V internal reference. In my hardware I only have a 2.2uF capacitor between VREFHI and VREFLO. So I thought I had to choose a internal reference. My problem is my ADC is unstable. I am using 5 ADCs (for connected to a slider, 3.3V or 0V, and one connected to a variable voltage). At least the sliders should be stable, but they are not, going from 0x00, 0xfff, variable values in between (reading the raw value from the registers). I do not know what I configured wrong. Here is the code for reading, which should not affect the raw values:

uint8_t readCANID(){

    uint8_t sample = 0;

    ADC_forceMultipleSOC(ADCA_BASE, (ADC_FORCE_SOC0 | ADC_FORCE_SOC5 | ADC_FORCE_SOC11 | ADC_FORCE_SOC14 | ADC_FORCE_SOC15));
   
    while(ADC_getInterruptStatus(ADCA_BASE, ADC_INT_NUMBER4) == false);
    ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER4);
   
    float ADC0 = ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER0) * 2.5 / 4095;
    sample |= (ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER5) > 3500) << 3;
    sample |= (ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER11) > 3500) << 2;
    sample |= (ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER14) > 3500) << 1;
    sample |= (ADC_readResult(ADCARESULT_BASE, ADC_SOC_NUMBER15) > 3500) << 0;
   
    return (sample & 0xF);
   
}

And the code generated from Sysconfig:

void myADC0_init(){
    //
    // ADC Initialization: Write ADC configurations and power up the ADC
    //
    // Set the analog voltage reference selection and ADC module's offset trims.
    // This function sets the analog voltage reference to internal (with the reference voltage of 1.65V or 2.5V) or external for ADC
    // which is same as ASysCtl APIs.
    //
    ADC_setVREF(myADC0_BASE, ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
    //
    // Configures the analog-to-digital converter module prescaler.
    //
    ADC_setPrescaler(myADC0_BASE, ADC_CLK_DIV_2_0);
    //
    // Sets the timing of the end-of-conversion pulse
    //
    ADC_setInterruptPulseMode(myADC0_BASE, ADC_PULSE_END_OF_CONV);
    //
    // Powers up the analog-to-digital converter core.
    //
    ADC_enableConverter(myADC0_BASE);
    //
    // Delay for 1ms to allow ADC time to power up
    //
    DEVICE_DELAY_US(5000);
    //
    // SOC Configuration: Setup ADC EPWM channel and trigger settings
    //
    // Disables SOC burst mode.
    //
    ADC_disableBurstMode(myADC0_BASE);
    //
    // Sets the priority mode of the SOCs.
    //
    ADC_setSOCPriority(myADC0_BASE, ADC_PRI_ALL_ROUND_ROBIN);
    //
    // Start of Conversion 0 Configuration
    //
    //
    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    //      SOC number      : 0
    //      Trigger         : ADC_TRIGGER_SW_ONLY
    //      Channel         : ADC_CH_ADCIN0
    //      Sample Window   : 16 SYSCLK cycles
    //      Interrupt Trigger: ADC_INT_SOC_TRIGGER_NONE
    //
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN0, 16U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER0, ADC_INT_SOC_TRIGGER_NONE);
    //
    // Start of Conversion 5 Configuration
    //
    //
    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    //      SOC number      : 5
    //      Trigger         : ADC_TRIGGER_SW_ONLY
    //      Channel         : ADC_CH_ADCIN5
    //      Sample Window   : 16 SYSCLK cycles
    //      Interrupt Trigger: ADC_INT_SOC_TRIGGER_NONE
    //
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER5, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN5, 16U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER5, ADC_INT_SOC_TRIGGER_NONE);
    //
    // Start of Conversion 11 Configuration
    //
    //
    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    //      SOC number      : 11
    //      Trigger         : ADC_TRIGGER_SW_ONLY
    //      Channel         : ADC_CH_ADCIN11
    //      Sample Window   : 16 SYSCLK cycles
    //      Interrupt Trigger: ADC_INT_SOC_TRIGGER_NONE
    //
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER11, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN11, 16U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER11, ADC_INT_SOC_TRIGGER_NONE);
    //
    // Start of Conversion 14 Configuration
    //
    //
    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    //      SOC number      : 14
    //      Trigger         : ADC_TRIGGER_SW_ONLY
    //      Channel         : ADC_CH_ADCIN14
    //      Sample Window   : 16 SYSCLK cycles
    //      Interrupt Trigger: ADC_INT_SOC_TRIGGER_NONE
    //
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER14, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN14, 16U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER14, ADC_INT_SOC_TRIGGER_NONE);
    //
    // Start of Conversion 15 Configuration
    //
    //
    // Configures a start-of-conversion (SOC) in the ADC and its interrupt SOC trigger.
    //      SOC number      : 15
    //      Trigger         : ADC_TRIGGER_SW_ONLY
    //      Channel         : ADC_CH_ADCIN15
    //      Sample Window   : 15 SYSCLK cycles
    //      Interrupt Trigger: ADC_INT_SOC_TRIGGER_NONE
    //
    ADC_setupSOC(myADC0_BASE, ADC_SOC_NUMBER15, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN15, 15U);
    ADC_setInterruptSOCTrigger(myADC0_BASE, ADC_SOC_NUMBER15, ADC_INT_SOC_TRIGGER_NONE);
    //
    // ADC Interrupt 4 Configuration
    //      Source  : ADC_SOC_NUMBER15
    //      Interrupt Source: enabled
    //      Continuous Mode : disabled
    //
    //
    ADC_setInterruptSource(myADC0_BASE, ADC_INT_NUMBER4, ADC_SOC_NUMBER15);
    ADC_clearInterruptStatus(myADC0_BASE, ADC_INT_NUMBER4);
    ADC_disableContinuousMode(myADC0_BASE, ADC_INT_NUMBER4);
    ADC_enableInterrupt(myADC0_BASE, ADC_INT_NUMBER4);
}
 
Thanks for any help. I apologize if this is a dumb problem.
Best regards,
Diana
  • Hi Diana,

    The concept of SOC is it is used as a conversion sequencer.  The F28003x has 16 SOCs.  Conversion typically starts at SOC0 and progresses to SOC15 in round robin mode, which is what is configured in your code.  SOC setup however can be optimized in your code.  I believe there is a mix up of SOC# and ADC channel assignment.  SOC# setup does not have to follow the ADC channel #.  What i mean is that you can change your SOC setup so that SOC0->ADCIN0, SOC1->ADCIN5, SOC2->ADCIN11, SOC3->ADCIN14, SOC4->ADCIN15.  As for VREF3.3 internal reference, yes you do not have to do anything.

    I do not see anything that is obviously wrong in using the slider (switch) on choosing the level for 0v/3.3v for deciding the ID position depending on conversion results.  Just do a quick check maybe by measuring the levels on ch5,11,14,15 that they are indeed at 0v or 3.3v and sliders are not momentarily opening/closing.  Could be that your issue is due to sequencer (SOC) configuration. Try changing the sequencing first to see if you get the correct IDs/conversions with the SOC change.

    Thanks,

    Joseph 

  • I made the change and the sliders work okay. The value changes sometimes but nothing bad, the worst read voltage was 3.0V. But the SOC0 which is always changing, with only 2.5V sometimes is 0xfff, other 0x000, or a random value. I did not if it was the pin, maybe I put to much voltage one time and it destroy it, I changed pin but the other is also in random in between numbers or in 0xfff.

  • Try moving SOC0 to a different channel.  What is the voltage source of SOC0 and is there an impedance associated with the source (like RC)?  If there is, it would have to be accounted for in the setting of sample hold time.  This will be available in the SysConfig SOC setup.  Need to fill in the source resistance and capacitance and SysConfig will determine the required sampling time for the input voltage to settle.

  • It was a hardware problem. I had the capacitor between VREFHI and VREFLO but forgot to connect VREFLO to GND. My bad. Thanks for the help and I apologize for my mistake.