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TMS320F28P550SG: Why the ADC conversion is more than its data sheet specified?

Jeffrey Jin
Prodigy 155 points

Part Number: TMS320F28P550SG
Other Parts Discussed in Thread: C2000WARE

Hi Experts,

To verify the conversion time for adc modue (12 bits), I use example of adc_ex2_soc_epwm from C2000ware 5.02 and modify. Now, AdcaRegs.ADCCTL2.PRESCALE = 0; ClkCfgRegs.SYSCLKDIVSEL.bit.PLLSYSCLKDIV = 1; AdcaRegs,ADCSOC0CTL.ACQPS = 9;

The total time between pwm trigger (SOC) to adcA1ISR() (end od conversion) is about 1 uS from osscillscope. Meanwhile, the pwm reg. TBCTR is about 145 when measuring it at beginning of adcA1ISR() .  So its duration is 145 x 6.67ns = 967 nS.

After remove adc S/H (10 x 6.67=66.7nS) and adcA1ISR() function call time about 0.2uS, 700 nS is the estimation of adc conversion time.

The data sheet says Analog-to-Digital Converter (ADC) (12-bit) is 187 ns typical. 

Why the ADC conversion in my testing is more than its data sheet specified?  How to reduce the conversion time ?  Please advice. 

Thanks,

Jeffrey Jin

  • 0
    TI__Expert 8450 points

    Hello,

    I think the main point is that your oscilloscope measurement is not measuring only the ADC conversion time. The 1 µs you see from PWM SOC to the beginning of adcA1ISR() includes much more than the ADC core conversion including PWM trigger to ADC wrapper/SOC handling, sample-and-hold window, ADC end-of-conversion / interrupt generation, PIE + CPU interrupt latency, ISR entry overhead, any GPIO toggle or register-read code used for measurement and extra delay if code is running from Flash instead of RAM.

    To reduce the observed latency you can measure ADC EOC / ADCINT timing instead of ISR entry if you want the true ADC conversion timing. Place the ISR in RAM instead of Flash and keep the ISR extremely short and toggle a GPIO as the very first instruction.

    Best Regards,

    Masoud