F29H85X-SOM-EVM: Secure IPC between CPU1 and HSM.

Shashank Bikkanuri

Hi,

I am currently working on integrating a UART flash-based Secondary Bootloader (SBL) with a multi-core project. While attempting to update the code using the SBL, it continuously waits for a semaphore to be released within the SIPC of the HSM during the certificate verification process. I would like to understand how this issue can be resolved.

Regards,

Shashank

3 months ago

0 Aditya Singal 3 months ago

TI__Intellectual 1620 points

Hi Shashank,

Let me look into this and get back to you.

Thanks and Regards,
Aditya Singal

0 Shashank Bikkanuri 3 months ago in reply to Aditya Singal

Intellectual 530 points

Hi Aditya,

Just wanted to follow up on my earlier query. Please let me know if there’s any update

Thanks and Regards,

Shashank

0 Aditya Singal 3 months ago in reply to Shashank Bikkanuri

TI__Intellectual 1620 points

Hi Shashank,

Apologies for the delay, I had to rush back home for a family emergency and got back recently.
Is it okay if I get back to you Monday?

Thanks and Regards,
Aditya Singal

0 Shashank Bikkanuri 2 months ago in reply to Aditya Singal

Intellectual 530 points

Hi Aditya,

I hope you’re doing well. I just wanted to kindly check if there are any updates on this whenever you have a chance.

Thanks and Regards,

Shashank

0 Aditya Singal 2 months ago in reply to Shashank Bikkanuri

TI__Intellectual 1620 points

Hi Shashank,

We are unable to comment on what could be the reason for this.
If it is stuck at SemaphoreP_pend then that means that the Semaphore has not been released.
This usually means that there is no response from HSM.

You can check the HSM state for the same. Status registers are accessible if debug port is opened for HSM.

Thanks and Regards,
Aditya Singal

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F29H85X-SOM-EVM: Secure IPC between CPU1 and HSM.