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TMS320F28075: TMS320F28075: Flash boot failing after programming Z1_BOOTCTRL = 0x815A

Part Number: TMS320F28075
Other Parts Discussed in Thread: C2000WARE,

What I did:
I programmed the Z1_BOOTCTRL register (OTP) with the value 0x0000815A.
Key: 0x5A
BMODE: 0x81 (Intended for SCI Boot Option 2: GPIO28/29)
BOOTPIN0/1: 0x00 (Defaulting to GPIO84 and GPIO72)
The Problem:
When GPIO84=1 and GPIO72=1, the device fails to boot from Flash and appears to go SCI boot mode. I am able to flash the device using  ti's serial flash programming tool
The serial flash programmer works on GPIO28/29 when the pins are high, but standalone execution from Flash is impossible.
When I pull GPIO72 low and GPIO84 high, sci boot kernel is not loading when testing using serial flash programmer.

Questions for the TI Experts:
Does setting BMODE = 0x81 in Z1_BOOTCTRL hardcode the device to SCI Boot, effectively ignoring the GPIO84/72 pin logic for "Get Mode" (Flash)?
What is the correct BMODE or BOOT_DEF configuration for the F28075 to allow GPIO84/72 to toggle between Flash and SCI-Boot on GPIO28/29?

  • Hello,

    Regarding your questions:

    Q1: Does BMODE=0x81 hardcode SCI Boot and ignore GPIO84/72?

    No, the GPIO pins are always read. With both GPIO84 = 1 and GPIO72 = 1, the boot ROM decodes BootMode = 3 ("Get Mode"). Get Mode then reads BMODE =  0x81 from OTP → SCI Boot 1 on GPIO29 (TX) / GPIO28 (RX). 


    Q2: What is the correct BMODE for GPIO84/72 to toggle between Flash and SCI Boot on GPIO28/29?

    0x0000815A for SCI Boot 1 on GPIO28/29 is valid. However, it provides no path to standalone Flash boot — if the SCI bootloader is executed every time, it ends up just waiting for a host autobaud character.

    To still use GPIO84=1, GPIO72=1 to get to Flash Boot, BMODE must be 0x0B:
    Correct OTP value would then be: 0x00000B5A
    Key = 0x5A BMODE = 0x0B (Flash Boot, entry 0x00080000)
    BMSP0 = 0x00 BMSP1 = 0x00 (default boot mode select pins GPIO84 / GPIO72)


    Why does GPIO72 = 0, GPIO84 = 1 fail with the serial flash programmer?

    GPIO72 = 0, GPIO84 = 1 decodes to BootMode = 1 = SCI Boot 0, which uses GPIO84 (TX) / GPIO85 (RX) — not GPIO28/29. Your programmer is likely on the wrong pins for that state.

    References:

    • TRM Boot chapter, e.g. see pages 571, 572, 574, 578, 601, 602
    • F2807x Boot ROM source code:  C:\ti\c2000\C2000Ware_26_00_00_00\libraries\boot_rom\f2807x\revB\rom_sources\ 

    Best Regards,

    Allison

  • Thanks for detailed answer.
    I would like to confirm that I can switch between flash boot and sci boot if OTP is 0x0B5A using state if GPIO 72 and GPIO 84.

    I have few more design related queries  In our design we have interfaced a SRAM using EMIF pins of tms320f28075.

    a) GPIO85 is used as SCIARX and EM1D0. Will it not create any data corruption in SRAM during firmware update process. 
    b) The application requires active communication via SCI while the EMIF is in use, will switching the GPyMUX registers cause corruption on the SRAM bus or lead to illegal memory access.


  • Hi Gustavo,

    Please allow another day for me to respond  

    Thanks & Regards,

    Allison 

  • Hi Guarav, 

    With GPIO72 = 1, GPIO84 = 1 --> Get Mode --> BMODE = 0x0B --> Flash Boot enter 0x80000

    With GPIO72 = 0, GPIO84 = 1 --> SCI Boot 0 --> GPIO84 (TX) /  GPIO85 (RX)

    For (a) and (b), since these are EMIF related questions - please create a new thread so it can be assigned to the right expert. 

    Best Regards,

    Allison