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TMS320F28P659SH-Q1: Any drawback to use AIO or AGPIO instead of GPIO for digital signals?

Part Number: TMS320F28P659SH-Q1

Team,
I have seen this older post already:
https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/432344/difference-between-aio-and-gpio-pins-for-tms320f28027

Also I looked at:
-TRM www.ti.com/.../spruiz1 section "14.3 Digital Inputs on ADC Pins (AIOs)" and "17.4 Digital Inputs and Outputs on ADC Pins (AGPIOs)".
-Datasheet www.ti.com/.../sprsp69 section 5.5.2 Digital Inputs and Outputs on ADC Pins 

Questions:
-Are there any drawback to use AIO or AGPIO pins instead of GPIO for a digital interface?
-For example could AIO / AGPIO pins be more prone to noise or lake accuracy? (apart from the high dv/dt use case listed in note of section 17.4)
-Are there some interface that are more sensitive to electrical signaling for which it is prefered to use a GPIO only pin? 

-AIO are not listed in Datasheet Table 5-12 unused pins:
Does it mean that each AIO/AGPIO is associated with a GPIO and one of the acceptable practise for GPIO need to be used?
or is it better to select AGPIO (vs GPIO) for unused pins as it is by default disconnected?

Thanks in advance,
Anber

  • Hello,

    This thread has been re-assigned to the intended SME. Please expect a short delay in assistance.

    Best,

    Matt

  • Hi Anber,

    Great questions, and it's clear you've already done thorough homework with the TRM and datasheet.


    Drawbacks of AIO/AGPIO vs. Standard GPIO for Digital Interfaces

    There are real functional and electrical differences to be aware of:

    1. AIO pins are input-only. They cannot drive digital outputs at all [1]. This immediately rules them out for any bidirectional or output-driven digital interface. AGPIOs, by contrast, do support full bidirectional digital I/O [2].

    2. Crosstalk into adjacent analog channels. This is the primary electrical concern beyond the dv/dt note you already found. Digital signals with sharp edges on AIO or AGPIO pins can couple into neighboring analog signals [1]. This can cause false CMPSS (comparator subsystem) events lasting up to 50ns [1]. So even if you're not worried about the digital signal itself being noisy, you risk corrupting adjacent analog measurements.

    3. Series resistance in the AGPIO path. The AGPIO analog pin path includes a 53Ω series switch resistance [1]. While this doesn't affect digital logic levels for slow interfaces, it does affect drive strength and edge rates compared to a standard GPIO, which could matter for faster protocols.

    4. Best practice — minimize I/O activity near ADC inputs. The datasheet explicitly recommends reducing IO activity on pins adjacent to ADC input and VREFHI pins to limit capacitive coupling and crosstalk [3].

    Which interfaces should prefer standard GPIO-only pins?

    For any protocol with fast edge rates or tight timing requirements — SPI, high-speed UART, or any interface where signal integrity matters — standard GPIO pins are preferred. The 53Ω series resistance and crosstalk risk make AIO/AGPIO pins a less robust choice for these. Slower, less timing-critical signals (e.g., simple status flags, low-speed enable lines) are more tolerant of AGPIO usage, provided adjacent channels aren't performing sensitive analog measurements.


    Unused Pin Handling: AIO/AGPIO vs. GPIO

    This is a great catch regarding Table 5-12. Here's the key distinction:

    Pin Type
    Default State
    Unused Pin Recommendation
    Standard GPIO
    Requires explicit configuration per Table 5-12 practices
    Must follow datasheet guidance (pull-up/down, output driven, etc.)
    AIO
    Analog mode; GPIO side is high-impedance [1]
    Associated with a GPIO — follow GPIO unused pin practices
    AGPIO
    Disconnected from both ADC and GPIO by default (AGPIOCTRLx.GPIOy = 0, GPxAMSEL.GPIOy = 1) [1]
    Already in a safe disconnected state — no additional configuration needed

    To directly answer your question: AGPIO pins in their default state are already disconnected from both the analog and digital domains [1], making them inherently safe when unused without additional configuration. For AIO pins, since they default to analog mode with the GPIO in high-impedance [1], and they are associated with a GPIO, you should follow the standard GPIO unused pin practices from Table 5-12 to ensure a known, safe state.

    So yes — for unused pins, the AGPIO default disconnected state is preferable over needing to explicitly configure a GPIO. But if you have unused AIO pins, treat them like their associated GPIO and apply Table 5-12 guidance.


    Summary

    • Use standard GPIO pins for digital interfaces requiring fast edges, precise timing, or bidirectional communication near active analog channels.
    • AGPIO is acceptable for slower digital I/O if you control edge rates and no adjacent analog channels are active.
    • AIO is limited to digital input only — not suitable for most digital interfaces.
    • For unused pins: AGPIO's default disconnected state is the safest with no configuration needed; AIO/GPIO unused pins should follow Table 5-12 practices.

    Let me know if you need clarification on specific pin assignments or interface routing for your design.


    1. TMS320F28P65x TRM (SPRUIZ1B)
    2. TMS320F28P65x Datasheet (SPRSP69D) - Section 5.5.2
    3. TMS320F28P65x Datasheet (SPRSP69D) - Best Practices

    Best Regards,

    Zackary Fleenor

  • Hi Zackary,

    Thank you for your detailed and very helpful response. I may have worded my question incorrectly to Anber, but this information is very useful!

    I am really trying to understand whether there is a performance difference in using AGPIO vs AIO for the measurement of analog signals, i.e. noise? Would you recommend using one over the other where possible? 

    As I understand it we need to design a RC filter at the input of the ADC, would I be correct in saying that the RC Filter for all AIO would be the same (assuming the same input), but we would need to consider the 53ohm extra resistance when inputting to the AGPIO?

    Thanks in advance,

    Andrew

  • Hi Andrew,

    You're very welcome! Glad the previous information was helpful. And you’re right to clarify – the original question was broad, and you’re honing in on a very specific and important consideration for analog signal integrity.

    AGPIO vs. AIO for Analog Signal Measurement – Noise Considerations

    Yes, there *is* a difference in potential noise performance between AGPIO and AIO when directly measuring analog signals, though it's nuanced.

    • AIO (Analog Input Only): These pins are designed *specifically* for analog input. They have dedicated input protection and lower internal capacitance optimized for signal acquisition. This typically translates to slightly better noise performance and higher signal fidelity.
    • AGPIO (Analog GPIO):** While functional as analog inputs, AGPIO pins inherently have the 53Ω series resistance in the signal path, as we previously discussed. This resistance, combined with the pin’s parasitic capacitance, can create a slightly higher noise floor, particularly at higher frequencies. The switching action to enable GPIO functionality also introduces a small amount of additional noise coupling. However, this is generally minimal in well-designed systems.

    Recommendation: Where possible, and if your application allows selecting the pin type during design, AIO pins are generally preferred for direct analog signal measurement. They offer a cleaner path and slightly better noise characteristics. However, don't over-engineer this unless you're facing known noise issues. The difference *can* be small, and AGPIOs are perfectly usable for analog measurements in many applications.

    RC Filter Considerations

    You are absolutely correct in your understanding of the RC filter!

    • AIO:** The RC filter calculation for all AIO pins can be the same *for a given input signal*. They have the consistent input impedance expected for an analog input.
    • AGPIO:** You *must* factor in the 53Ω series resistance when calculating the RC time constant for AGPIO inputs. This will result in a *lower* overall resistance in your RC circuit, and therefore a *faster* filter response (shorter time constant).

    Impact of the 53Ω: This means you might need to adjust the resistor value in your RC filter to achieve the same desired filtering effect when using an AGPIO pin. Failing to account for the 53Ω effectively makes the filter ‘less resistant’ than you intended, potentially allowing more high-frequency noise to pass.

    Important Note: Don't overlook the ADC input capacitance (specified in the datasheet) when calculating the filter’s cut-off frequency. A more precise calculation will use both the resistor (including the 53Ω for AGPIO) *and* the ADC input capacitance.

    Let's start an additional thread if you have any further questions about filter design, noise mitigation, or pin selection. Happy to help you dial in the best configuration for your application!

    Best Regards,

    Zackary Fleenor

  • Hi Zackary,

    Thank you for your response, it is very useful.

    I would just like to clarify your instruction regarding TMS320F28P65x unused pins. I am analysing your guidance whilst also considering Table 5-12 of the device datasheet: 

    GPIO

    For unused GPIO, we plan to leave these unconnected in our design, with the option to configure them as inputs or outputs ( with internal resistors enabled or disabled accordingly).

    AGPIO

    We will follow your guidance on this. You suggest that these pins are isolated from both the analogue and digital domains when unconfigured, so we will leave these pins unconnected in our design.

    AIO

    Your guidance suggests that unused AIO should follow the datasheet practices for GPIO pins. We had originally connected these unused pins to VSSA (AGND) in our design (primarily for noise immunity concerns). This was based on the datasheet practices for ADCINx (except DAC pins) However, is a better approach to leave these unterminated like the other unused GPIO pins, and configure these as digital inputs with the internal pull-up enabled?

    DAC Pins

    We plan to use all DAC output pins in our design. However, in the 169NMR package, if pin N2 is unused, would it be considered a DAC pin or ADC pin? It can be configured as a an optional connection for an external DAC reference voltage or as an ADC input.

    Can you please confirm that our design approach above in each case is correct,

    Thanks in advance,

    Andrew

  • Hi Andrew,

    You’re very welcome – glad we're diving into the details! Your questions are excellent and demonstrate a good understanding of the potential subtleties.

    GPIO – Unconnected is Fine

    Your plan to leave unused standard GPIO pins unconnected, with the ability to configure them as inputs/outputs with internal resistors as needed, is perfectly aligned with the datasheet recommendations (Table 5-12). This provides flexibility during development and avoids unnecessary loading.

    AGPIO – Default Disconnected is Best

    You've correctly understood my recommendation. Leaving AGPIO pins unconfigured (allowing them to remain disconnected) is the simplest and safest approach. No further action is needed.

    AIO – Reconsider VSSA Connection, Pull-Up Preferred

    You've hit on a really important nuance here. Connecting unused AIO pins directly to VSSA (AGND) isn't *incorrect*, but it's likely *not optimal*. Your initial reasoning of noise immunity is valid, but it introduces a DC path. Here's why I recommend the pull-up resistor approach:

    • Floating Input Concerns: Leaving an AIO completely floating can make it susceptible to picking up noise and potentially causing false triggering or unexpected behavior, especially in environments with strong electromagnetic interference (EMI).
    • Internal Pull-Up Benefits: Configuring the AIO as a digital input with the internal pull-up enabled provides a defined logic state (high) when the pin isn't actively driven. This helps avoid floating and makes the pin more predictable. Furthermore, *this also matches the datasheet guidance for unused GPIO pins as you correctly point out*, maintaining design consistency.
    • Lower Current Draw: Using the pull-up is preferable to a direct connection to VSSA, as it lowers the current draw in the unused state.

    Therefore, I recommend configuring unused AIO pins as digital inputs with the internal pull-up resistor enabled. This balances noise immunity with defined logic levels and matches the recommended practice for unused GPIO.

    DAC Pin N2 (169NMR Package) – ADC Input

    You are correct to be cautious! In the 169NMR package, pin N2 is fundamentally *designed as an ADC input* even though it *can* be configured for an optional DAC reference voltage. It is associated with ADCINx. Therefore, you should treat it as an ADC input pin for your unused pin handling practices. Follow the recommendations in the datasheet for unused ADC inputs. Do *not* treat it as a DAC pin for unused configuration purposes.

    To recap:

    • GPIO: Unconnected, configurable.
    • AGPIO: Unconfigured (disconnected).
    • AIO: Configured as digital input with internal pull-up.
    • Pin N2 (169NMR): ADC input - adhere to ADC unused pin guidelines.

    Let me know if you'd like me to elaborate on any of these points or if you have further questions. It’s good to get this right upfront to avoid potential issues later on in your design!

    Best Regards,

    Zackary Fleenor

  • Hi Andrew,

    I wanted to follow up on the unused pin configuration discussion we were having about a month ago. I hope my last response regarding GPIO, AGPIO, AIO, and DAC pin handling was helpful for your design decisions.

    I'm checking in to see if:

    1. You were able to successfully implement the unused pin configurations we discussed (particularly the AIO pins as digital inputs with internal pull-ups)?
    2. You have any remaining questions about pin N2 in the 169NMR package or any other unused pin handling?
    3. Your design has moved forward and everything is working as expected?

    If you've resolved all your concerns and your design is progressing well, that's great! Feel free to mark this thread as resolved. However, if you've encountered any new questions or issues during implementation—whether related to the analog performance, filter design, or pin configuration—I'm happy to continue the discussion.

    Also, if you've moved on to other aspects of your design (power sequencing, peripheral configuration, etc.), don't hesitate to start a new thread. We're here to help ensure your TMS320F28P659SH-Q1 design is successful.

    Looking forward to hearing how your project is progressing!

    Best Regards,
    Zackary Fleenor

  • Hi Zackary,

    Your response was very helpful and we adhered to your advice in our design, please feel free to mark the issue as resolved.

    As you mentioned, for any further enquires around the TMS320F28P65x device, we will begin a new thread,

    Thanks again,

    Andrew