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F28E120SC: PWM X-BAR TRIPOUTINV issue

Part Number: F28E120SC
Other Parts Discussed in Thread: SYSCONFIG

Hi,
customer want to implement over voltage detection and trip the PWM. He programmed CMP, X-BAR, PWM and recognised that the PWM tripped by a low voltage not at high voltage. After further evaluation he recognised that he has to set the OUT bit to 1 (invert) in register TRIPOUTINV and so that high voltage trips the PWM as expected. He verified that the comparator is running well as he routed the CMPOUT to a GPIO pin.
It seems that somewhere the CMPOUT signal is inverted inside the F28E12 to the PWM trip. Can you verify that? 
I can send you also the sysconfig file.

Regards, Holger

  • Hi Holger,

    Your customer's observation is correct. The CMPOUT signal is inverted in the path between the comparator output and the PWM trip input, and this is by design, not a bug.

    Why This Happens

    The root cause is straightforward: MCPWM trip zone signals are active-low [1]. The comparator (CMPSS) naturally outputs an active-high signal when the input exceeds the DAC threshold (i.e., overvoltage detected). However, because the MCPWM expects an active-low trip signal, the PWM X-BAR inverts the comparator trip signal (CTRIPH) internally before routing it to the MCPWM [1].

    This is why:

    • GPIO output showed correct polarity — the Output X-BAR does not apply this inversion, so routing CMPOUT to a GPIO pin reflects the true comparator state.
    • PWM tripped on low voltage instead of high — the internal inversion in the PWM X-BAR flipped the sense, causing the trip to occur on the wrong condition.

    The Correct Fix

    Setting the TRIPOUTINV register's OUT bit to 1 is the correct and documented approach. This register sits at the final output stage of the PWM X-BAR [2] and is specifically designed to select the output polarity for TRIP1–TRIP8 signals going to the MCPWM [3]. Setting the bit to 1 inverts the signal a second time, canceling out the internal active-low inversion, so that a high comparator output (overvoltage) correctly triggers the PWM trip.

    Signal Path Summary

    Stage
    Signal Polarity
    Notes
    CMPSS comparator output
    Active-high on overvoltage
    Comparator working correctly (verified via GPIO)
    PWM X-BAR routing
    Inverted (active-low)
    By design — MCPWM trips are active-low [1]
    TRIPOUTINV = 1
    Re-inverted (active-high → active-low trip)
    Compensates for the X-BAR inversion [2][3]
    MCPWM trip zone
    Trips correctly on overvoltage
    Expected behavior restored

    Additional Note

    There is also an alternative inversion point available within the CMPSS module itself: the COMPCTL[COMPHINV] bit (for the high-side comparator) or COMPCTL[COMPLINV] (for the low-side comparator) [4]. These bits invert the comparator output before it reaches the digital filter and CTRIPH/CTRIPL outputs. Either approach — TRIPOUTINV or COMPHINV/COMPLINV — will achieve the correct result, but using TRIPOUTINV as your customer has done is the more common and straightforward method for this use case.

    No SysConfig file review is needed unless there are other configuration concerns — the customer's fix is correct.


    1. F28E120SC TRM — CMPSSLITE Asynchronous Trip / Active-Low Trip Signals
    2. F28E120SC TRM — PWM X-BAR TRIPOUTINV Architecture
    3. F28E120SC TRM — TRIPOUTINV Register Description
    4. F28E120SC Datasheet — CMPSS COMPCTL Inversion Bits

    Best Regards,

    Zackary Fleenor