C2000WARE-DIGITALPOWER-SDK: PSFB Synchronous PWM Generation for Secondary Side MOSFETs

Mayank Kumar

Part Number: C2000WARE-DIGITALPOWER-SDK
Other Parts Discussed in Thread: TMS320F280049C, PMP23126, C2000WARE

You can post the following on the TI E2E C2000 forum:

Hi TI Experts,

I am working on a Phase Shifted Full Bridge (PSFB) DC-DC converter using the TMS320F280049C controlCARD / LaunchPad for PWM generation.

For reference, I am following the TI application report:

PSFB Control Using C2000 Microcontrollers (SPRABR1)

In my design, synchronous rectification MOSFETs are used on the transformer secondary side (similar to Q5 and Q6 shown in the application report). I am using MATLAB/Simulink with the C2000 Microcontroller Blockset for PWM generation and code generation.

Currently, I am facing difficulties generating the synchronous PWM signals for the secondary-side MOSFETs. The primary-side phase-shifted PWM generation is working, but I need guidance on implementing the SR PWM logic correctly in Simulink for the F280049C.

My questions are:

What is the recommended method to generate synchronous rectifier PWM signals for PSFB on F280049C?
Should separate ePWM modules be used for SR MOSFETs with synchronization through TBPHS/Sync chain and dead time control for the generated PWM?
Is there any TI example project, reference code, or Simulink model available for secondary-side SR PWM generation in PSFB topology?
Can this be implemented efficiently using ePWM synchronization only, or is CLB also recommended?
Are there any specific considerations while implementing this using the C2000 Simulink Blockset?

I also checked the following TI references:

Any guidance, waveform generation approach, or example configuration would be very helpful.

Thanks,
Mayank Kumar

4 months ago

0 Venkata Praneeth Somina 4 months ago

TI__Intellectual 2670 points

Hi Mayank,
PMP23126 is also a Phase shifted full bridge reference design. In Digital Power SDK, Matlab files are provided. You can refer to this designPMP23126 reference design | TI.com
The solution is available in Digital Power SDK.
Thanks
Praneeth

0 Mayank Kumar 4 months ago in reply to Venkata Praneeth Somina

Prodigy 30 points

Hello Praneeth

Thanks for prompt reply... I am not able to see any Simulink file in the given path you mentioned

Please share the downloadable link here if possible

Thanks

Mayank

0 Venkata Praneeth Somina 4 months ago in reply to Mayank Kumar

TI__Intellectual 2670 points

Hi Mayank,
You can find Simulink files at C:\ti\c2000\C2000Ware_DigitalPower_SDK\solutions\pmp23126\matlab
You can download Digital Power SDK here C2000WARE-DIGITALPOWER-SDK Software development kit (SDK) | TI.com
Thanks
Praneeth

0 Mayank Kumar 4 months ago in reply to Venkata Praneeth Somina

Prodigy 30 points

Hello Praneeth

Got the files but need clarification on the PWM generation logic for Q5 and Q6. Specifically, I need support on:

How the synchronous PWM for secondary-side MOSFETs (Q5 & Q6) should be generated in PSFB topology.
How the secondary PWM should be synchronized with the primary-side PWM.
Dead-time implementation between secondary MOSFETs.
Whether dead-time should track/adapt based on primary-side phase shift or transformer current direction.

Thanks

Mayank

0 Venkata Praneeth Somina 4 months ago in reply to Mayank Kumar

TI__Intellectual 2670 points

Hi Mayank,
I Understood. I will get back to you by the end of tomorrow.
Thanks
Praneeth

0 Venkata Praneeth Somina 4 months ago in reply to Venkata Praneeth Somina

TI__Intellectual 2670 points

Hi Mayank,
Based on the figure you have shown, this design has two ways of generating SR pulses. One is SR pulses will only conduct when there is overlap between the primary half bridges. Second is SR would not conduct only during the overlap. So generation of SR pulses is completely dependent on phase shift between the primary half bridges.
In mode 1, Q5 start conducting when Q1's falling edge is detected and Q5 stops conducting when Q3's rising edge is detected.
In mode 2, Q5 starts conducting when Q3's falling edge is detected and Q5 syops conducting when Q1's rising edge is detected.
This can be implemented in various ways. If PCMC is being implemented, the trip signal can be used to make Q5 turn on using Action Qualifier's T1,T2 action. Using compare submodule Q5 can be turned off
Similar process can be followed for Q6.
Deadtime depends on the body diode characteristics and transformer current direction. Once these are determined, individual dead time can be implemented using dead band sub module. If adaptive dead time is not possible, then approximate fixed dead times need to be implemented based on the load current.

Thanks
Praneeth

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C2000WARE-DIGITALPOWER-SDK: PSFB Synchronous PWM Generation for Secondary Side MOSFETs