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TMS320F2800157-Q1: How to find the flash ecc related register?

Shuqing Zhou
Expert 4185 points

Part Number: TMS320F2800157-Q1

Hi team,

I ask this for my customer.

In our TRM, it exists some description for flash single bit error, but i can't find the register it mentioned, and also can't find the register define in the hw_flash.h file in SDK

image.png

customer is doing single-bit error injection test(not using the ECC test mode), they find after they inject the single bit error and read it, the error count is increase, but the data read back is not correct automatictly, could you help to suggest what may cause this?

BRs

Shuqing

  • 0
    TI__Expert 4185 points

    Hi team,

    any update for this?

    In customer's functional safety design, it will do the ECC test(follow our sdl demo: sdl_ex_flash_ecc_test), this ecc test pass successfully. And then they need to inject the single bit error on purpose, and read back to check if data is correct.

    their test is showed in below: they will erase it firstly

    after read this address, they can see device detect the single bit error, CERRCNT add1, but the data(flash_data) is not be corrected automatically.

    the ECC is enabled, why this is not corrected?

    If it because their test operation is wrong, could you tell me how to inject the single bit error and test it?

    BRs

    Shuqing

  • 0 in reply to Shuqing Zhou
    TI__Expert 4530 points

    Hello Shuqing,

    Is the customer code waiting for the flash operation to finish after issuing it by calling Fapi_getFsmStatus() until it has completed? No flash access should take place on a bank that has an active operation in progress.

    Best,

    Alex

  • 0 in reply to Alex Wasinger
    TI__Expert 4185 points

    Hi Alex,

    I will let customer to wait sometime before it read back

    Are you delete the answer?

    What's more, I try to program the same address without erase, it can't work, flash api will return the error

    Could you help to check any other method to test ECC?(in additional to using the ECC test mode)

    BRs

    Shuqing

  • 0 in reply to Shuqing Zhou
    TI__Expert 4530 points

    Hello Shuqing,

    Apologies for the delay in response. I amended the previous answer after seeing that the Data+ECC = 0xFFFF condition did not apply.

    The ECC logic is working as intended here. The ECC comparison is done using 64 bits of flash and 8 bits of ECC. Your error registers indicate that the error occurred at the 18th bit position -- i.e. in the word after 0xEFFF, which is only 16 bits. This means that when the flash is read, the value is corrected to 0xFFFB EFFF. The customer can observe this in their code by reading the flash using a 32 or 64-bit pointer.

    Best,

    Alex