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F29P329SM-Q1: Why DCCENA always equal to 0x5?

Shuqing Zhou
Expert 4215 points

Part Number: F29P329SM-Q1

Hi team,

I ask this for my customer.

My customer want to use the DCC because of functional safety requirement.

They run the demo: C:\ti\f29h85x-sdk_26_00_00\examples\driverlib\single_core\dcc\dcc_ex3_continuous_monitoring_of_clock

but they find the DCCENA always equal to 0x5, but in our datasheet, it shows if DCCENA = 0x5, it means 

DCC is not enabled

image.png

in our demo, it shows it enable the DCC and write the DCCENA = 0xA

image.png

 

could you help to check this? thanks

BRs

Shuqing

  • 0
    TI__Expert 4215 points

    Hi team,

    Seems something error:

    And the count1 always equal to 0, not loaded from counter1 seed

    BRs

    Shuqing

  • 0 in reply to Shuqing Zhou
    TI__Guru* 80176 points

    Hi Shuqing,

    Shuqing Zhou said:

    but they find the DCCENA always equal to 0x5, but in our datasheet, it shows if DCCENA = 0x5, it means 

    DCC is not enabled

    I tested at my end and i could see same behavior at my end. I should need to discuss with hardware team to find out the root cause of the issue, however the corresponding expertise on this module is not available. 

    Seems like expertise unavailable till this weekend. Is it okay to provide further updates on this issue on next Monday/Tuesday?

    --
    Thanks & regards,
    Jagadish.