F29P329SM-Q1: What's the alignment requirement for the variable in memory?

Hello Shuqing,

To successfully program data to flash, the data must be at least 64-bit aligned.

The key to your question is the snippet: "such that the instruction location is within the 256 bits to be fetched" -- i.e. flash access is always 256-bit aligned, but instructions are not necessarily aligned to that same boundary.

Best,

Alex

Hi Alex,

thanks for your reply, still has below problem:

1. Is below understanding is correct: for instruction, 256bit alignment isn't must but if will influence code execution efficiency?

2. What's alignment for structure variable consist of Boolean variable? Is total structure variable should 8 bytes alignmentor every boolean variable should 8 byte alignment?

3. what's the alignment requirement for RAM? customer find stack also need to 8 byte alignment. If it isn't 8 byte alignment, the interrupt will run away

BRs

Shuqing

Shuqing,

Shuqing Zhou said:

1. Is below understanding is correct: for instruction, 256bit alignment isn't must but if will influence code execution efficiency?

Each instruction fetch from Flash memory reads out 256 bits total -- 128 bits from each half of an interleaved bank pair. The starting address of the access from Flash is automatically aligned to a 256-bit boundary, such that the instruction location is within the 256 bits to be fetched.

I've looped in another expert to answer 2 and 3.

Best,

Alex

Hi,

Memory initiators - CPU's are byte addressable and can generate write accesses that are 8/16/32/64 bits. All RAMs have ECC protection with a 32-bit granularity

A read-modify-write operation is performed locally in the MEMSS memory controller for 8 and 16-bit write accesses.

Refer to the Memory controller section of System control chapter in TRM

Thanks