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TMS320F28388D: McBSP MFSR and MFSX not synced

Vi Phan
Prodigy 10 points

Part Number: TMS320F28388D

I tried to set up the McBSP to have both TX and RX use the same pin for FS and CLK which are MFSX and MCLKX.

It doesn't seem to me that RX side can be triggered using MFSX and MCLKX. I setup the config to work around that by using sample rate generator to generate TX and supply RX.

The problem I have is that the MFSX pin and MFSR pin are not synced. I see that the MFSX and MFSR are 700ns apart.

Here is my config:

    McbspbRegs.SPCR2.bit.FRST = 0;
    McbspbRegs.SPCR2.bit.GRST = 0;
    McbspbRegs.SPCR2.bit.XRST = 0;
    McbspbRegs.SPCR1.bit.RRST = 0;

    McbspbRegs.SPCR1.bit.RJUST = 0;

    McbspbRegs.RCR2.bit.RDATDLY = 1;
    McbspbRegs.XCR2.bit.XDATDLY = 0;
    McbspbRegs.RCR1.bit.RWDLEN1 = 2;
    McbspbRegs.XCR1.bit.XWDLEN1 = 2;

    McbspbRegs.PCR.bit.CLKXM = 1;
    McbspbRegs.PCR.bit.CLKRM = 1;
    McbspbRegs.PCR.bit.FSXM  = 1;
    McbspbRegs.PCR.bit.FSRM  = 1;

    McbspbRegs.SRGR2.bit.FSGM = 1;

    /// Clock related
    McbspbRegs.SRGR1.bit.CLKGDV =  9;
    McbspbRegs.SRGR2.bit.FPER   = 32;
    McbspbRegs.SRGR1.bit.FWID   =  0;

    /// clock source
    McbspbRegs.SRGR2.bit.CLKSM  = 1;
    McbspbRegs.PCR.bit.SCLKME   = 0;

    McbspbRegs.SRGR2.bit.GSYNC  = 0;

    McbspbRegs.MFFINT.bit.RINT  = 1;

    __asm(" RPT #80 || NOP");

    McbspbRegs.SPCR2.bit.GRST = 1;
    McbspbRegs.SPCR2.bit.FRST = 1;

    __asm(" RPT #160 || NOP");

    McbspbRegs.SPCR2.bit.XRST = 1;
    McbspbRegs.SPCR1.bit.RRST = 1;

 

  • 0
    TI__Guru* 86160 points

    Vi,

    A couple of things to try:

    1)Make sure that the GPIOs that are in use have been configured to ASYNC mode as their qualification setting.  The default for GPIOs are sync'd to SYSCLK, but since we are feeding these to the McBSP, which has its own synchronization, we don't need/want this extra clock sync coming into play.  This is an independent setting vs the mux selection to configure the pins for McBSP

    2) McbspbRegs.RCR2.bit.RDATDLY = 1;

        McbspbRegs.XCR2.bit.XDATDLY = 0;
    Can we make these the same, i.e. XDATDLY = 1?  This might explain the difference in timing
    3)Turn on Global Sync
    McbspbRegs.SRGR2.bit.GSYNC = 1; // Changed from 0
    4)Use external frame sync, but also externally connect MFSX pin to MFSR pin, and MCLKX to MCLKR.
    // Configure sample rate generator to generate frame sync
    McbspbRegs.SRGR2.bit.FSGM = 1; // FSG generated by frame sync logic
    // Make MFSX an output (generator)
    McbspbRegs.PCR.bit.FSXM = 1; // FSX is output
    // Make MFSR an input and tie it to MFSX externally
    McbspbRegs.PCR.bit.FSRM = 0; // FSR is input (from MFSX pin)
    // Make MCLKX an output
    McbspbRegs.PCR.bit.CLKXM = 1; // CLKX is output
    // Make MCLKR an input and tie it to MCLKX externally
    McbspbRegs.PCR.bit.CLKRM = 0; // CLKR is input (from MCLKX pin)
    Best,
    Matthew