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TMS320F28388D: Secure BOOT on C2000 Device

Deepti T
Prodigy 50 points

Part Number: TMS320F28388D

I want to understand the secure boot application. as mentioned in article 400msec why additional time is taken. If we change the internal oscillator can the additonal time be reduced.TMS320 Secure Boot.pdf   image.png

  • 0
    TI__Mastermind 20380 points

    Hello,

    This timing difference is because CPU1 boots before CPU2, and is treated as the controlling core. On reset, CPU1 first executes the boot ROM using INTOSC2 (10MHz) by default. This cannot be changed. CPU1's application is responsible for bringing CPU2 out of reset. By then, the PLL can be configured for PLLSYSCLK = 200MHz, which is fed to both CPU1 and CPU2. Due to this boot ordering, CPU2's boot ROM will execute the secure ROM at 200MHz.

    Best,
    Matt