TMS320F2800137: VDDIO-BOR threshold

Part Number: TMS320F2800137
Other Parts Discussed in Thread: MSPM0C1105

Hi Expert,

In VDDIO-BOR circuit, we can see it covers two threshould: BOR-VDDIO-UP and BOR-VDDIO-DOWN, from my understanding it is used in power up and power down seperately, that means:

  1. During power up, when VDDIO voltage meet BOR-VDDIO-UP value, the device will release XRSn and start to work.
  2. During power down, when VDDIO voltage meet BOR-VDDIO-DOWN value, the device will hold XRSn with Low.

From my understand, BOR-VDDIO-UP should be larger than BOR-VDDIO-DOWN, to avoid un-wanted level jumping. In TI other MCU like MSPM0C1105, BOR-UP also higher than BOR-DOWN:

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However in F2800137 datasheet, BOR-UP is 2.7V while BOR-DOWN is 2.81V min and 3.0V max, if user application VDDIO is fix 2.9V, that would make the chip trig the BOR-UP and BOR-DOWN continuously, that seems not acceptable for end customer, what's the key purpose of this design? Could you explain more detail of this BOR mechanism? Thanks. 

image.png

 

Wiky

  • Hi Wiky,

    Thank you for the detailed question. You've made a very astute observation, and I want to clarify how the VDDIO BOR mechanism works on the F2800137.

    The key distinction here is the test conditions listed in the datasheet:

    • V_BOR-VDDIO-UP (2.7V typ) — measured "Before XRSn Release" (during ramp-up)
    • V_BOR-VDDIO-DOWN (2.81V min, 3.0V max) — measured "After XRSn Release" (during ramp-down)

    These two thresholds apply to different operating states of the device, not simply rising vs. falling voltage edges in the traditional hysteresis sense. The BOR-VDDIO-DOWN threshold being higher than BOR-VDDIO-UP is intentional — it ensures that once the device is running, VDDIO must be held at a sufficiently higher voltage to sustain reliable operation before a reset is asserted on the way down.

    Regarding your concern about a fixed 2.9V VDDIO application — since V_BOR-VDDIO-DOWN has a min of 2.81V and max of 3.0V, a fixed 2.9V VDDIO supply does fall within this range, meaning across process/temperature variation, a BOR event could potentially be triggered. For a fixed 2.9V VDDIO application, we would recommend either:

    1. Raising VDDIO to 3.0V or above to stay safely above the maximum BOR-VDDIO-DOWN threshold, or
    2. Reviewing the application requirements to determine if a lower VDDIO level (below 2.81V) is feasible, which would fall below the minimum BOR-VDDIO-DOWN threshold.

    Operating VDDIO within the BOR-VDDIO-DOWN min/max window is not a recommended operating condition for a stable, fixed-voltage design.

    Please let me know if you have any further questions.

    Best Regards,

    Zackary Fleenor