Part Number: TMS320F2800157-Q1
We will be using TMS320F2800157-Q1.
Please explain the relationship between G0 to G31 and TRIP 4 to 12 in the Technical Reference Table 10-2. EPWM X-BAR Mux Configuration Table.
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Part Number: TMS320F2800157-Q1
We will be using TMS320F2800157-Q1.
Please explain the relationship between G0 to G31 and TRIP 4 to 12 in the Technical Reference Table 10-2. EPWM X-BAR Mux Configuration Table.
Hi Yasushi-san,
G0 through G31 are the 32 mux input groups defined in Table 10-2. TRIP4 through TRIP12 are the output signals of the ePWM X-BAR. The relationship is: each TRIP output can independently select any combination of the 32 mux groups (G0–G31) as its input sources.
Here's how the architecture works:
Table 10-2 shows what signal each mux group can select. Each group (G0–G31) has four possible input signals (columns 0, 1, 2, 3) — for example, G0 column 1 is CMPSS1_CTRIPH_OR_CTRIPL, and G31 column 1 is INPUTXBAR14 [1]. You use the TRIPxMUXnCFG registers to pick which of the four column inputs each mux group passes through.
TRIP4, TRIP5, TRIP7, TRIP8, TRIP9, TRIP10, TRIP11, and TRIP12 are the eight output signals from the ePWM X-BAR that route to all ePWM modules [2][3]. Each TRIP output has its own set of configuration and enable registers:
|
Register
|
Function
|
|---|---|
TRIPxMUX0TO15CFG |
Selects which column input (0–3) for mux groups G0–G15
|
TRIPxMUX16TO31CFG |
Selects which column input (0–3) for mux groups G16–G31
|
TRIPxMUXENABLE |
Enables/disables which of G0–G31 feed into that TRIP output
|
TRIP4MUX0TO15CFG (offset 0h) and TRIP4MUX16TO31CFG (offset 2h); TRIP12 has TRIP12MUX0TO15CFG (offset 1Ch) and TRIP12MUX16TO31CFG (offset 1Eh) [4].Key point: Table 10-2 is shared across all TRIP outputs. Every TRIP signal (TRIP4–TRIP12) uses the same 32 mux groups, but each TRIP has its own configuration registers that independently select which column input each mux passes and which mux groups are enabled. The enabled mux outputs are OR'd together to produce the final TRIP signal.
So G0–G31 are not "assigned" to specific TRIP signals — rather, each TRIP signal can use any or all of G0–G31 simultaneously, configured independently through its own registers.