• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 65 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28P650DK: In CMPSS, does the DAC and comparator share the same clock

Hang Yang
Expert 3696 points

Part Number: TMS320F28P650DK

Hi Exeprts,

In CMPSS, does the DAC and comparator (output) share the same clock?

Regards,

Hang

  • 0
    TI__Expert 8580 points

    Hi Hang,

    No, not exactly. The CMPSS DAC and comparator output should not be viewed as sharing one common “operating clock.”

    The CMPSS DAC is an analog reference after its active DAC value is loaded. The DAC active value can be updated from the shadow register either on SYSCLK or on EPWM PWMSYNC, depending on the DAC load configuration. CMPSS_DACVAL_SYSCLK and CMPSS_DACVAL_PWMSYNC have DAC shadow-to-active load options.

    The comparator itself is an analog comparator, so its raw output is asynchronous. For the CMPSS output path, the user can select whether CTRIP/CTRIPOUT is driven by the asynchronous comparator output, synchronous comparator output, digital filter output, or latched filter output.

    Best Regards,

    Masoud