Part Number: F29H859TU-Q1
Hello,
My understanding of the TRM on how the pulse and level interrupts work is the following:
- Level interrupt
A peripheral triggers an interrupt. The interrupt is logged in the PIPE. If the current priority is lower than the interrupt priority, the interrupt is propagated to the CPU. The CPU then acknowledges the interrupt when it starts the associated interrupt handler. In the PIPE, the interrupt remains logged. If the interrupt handler clears FLAG and returns immediately, because the interrupt is not yet cleared in PIPE, the interrupt handler will be re-entered immediately - Pulse interrupt
A peripheral triggers an interrupt. The interrupt is logged in the PIPE. If the current priority is lower than the interrupt priority, the interrupt is propagated to the CPU. The CPU then acknowledges the interrupt when it starts the associated interrupt handler. In the PIPE, the interrupt is not "logged" anymore (FLAG remains set). If the interrupt handler clears FLAG and returns immediately, as the interrupt is not "logged" anymore (eventhough FLAG is not yet cleared in PIPE), the interrupt handler is not re-entered immediately
Is my understanding correct ?
This would mean that, for a pulse interrupt, there is no need to add 7 NOPs after clearing FLAG because, if the interrupt handler is exiting just after clearing FLAG, the interrupt will not be triggered again as it would be with a pulse interrupt.
If my understanding is not correct, please provide a detailed description of what happens in both use cases, and what would happen if FLAG is cleared just before exiting the interrupt handler.
Thank you
