Part Number: F29H850TU
Other Parts Discussed in Thread: F29H85X-SOM-EVM
Hello TI support team.
I am encountering an issue when configuring EPWM using XLINK.
I would appreciate your advice on potential causes and solutions, especially regarding problems that occur after a power cycle.
Device: F29H85X-SOM-EVM
Expected behavior:
Configure an XLINK group for EPWM1, 2, 4-11, 13, 14.
Configure AQCTLA, B using Global Load.
Configure XLINK for AQ, CC, and DB.
Start Global Load.
Problem symptoms:
Immediately after starting a debug session in CCS, it works as expected.
However, after power cycling the board, an NMI error occurs.
Upon checking the ErrorAggregator status, the following message was output:
```
C29xx_CPU1: Error Aggregator Status :
C29xx_CPU1: - CPU1_DR1 Errors (HP Error Addr = 0x7004006A, LP Error Addr = 0x00000000, PC = 0x10004C0C)
C29xx_CPU1: - ACC_ACK_ERR
C29xx_CPU1: Error Aggregator Status Done
```
I have prepared a minimal test project to reproduce the issue and have attached it for your reference.
Please check it.
Workaround:
I have found that inserting DEVICE_DELAY_US(5); immediately after SysCtl_enableEPWMXLINK(epwm_xlink_grop); prevents the NMI after a power cycle.
Is this workaround with the delay the appropriate measure for this problem?
If there is a more correct method, please let me know.
Also, if using a delay is the correct approach, what is the appropriate minimum duration in microseconds?
I am happy to provide any additional information if needed.
Thank you for your support.
Regards.