Part Number: TMS320F28P550SJ
Dear TI Support Team,
We are trying to know how the comparator ramp generator works, we are giving 2VDC to the comparator High Positive input and negative input is from the ramp generator through Internal DAC.
We are taking Ramp_reference value to 65535, and step value is 66 with ramp clock (SYSCLK/10 = 15MHz). and this max reference value will be reloaded with trigsync pulse coming from EPWMSYNCPER signal @ 15kHz. The expected output should be the square pulse as shown in the below diagram, we are not getting the output as expected. We are attaching the board.c , board.h and the CMPSS output waveform captured from oscilloscope.
Are we configuring the CMPSS Ramp generator correct? 

