Part Number: TMS320F28377D-EP
Other Parts Discussed in Thread: SYSCONFIG
Hi
When EPWMCLKDIV is set to/2, the following warning appears:
I checked the errata, but could not find relevant information.
Please answer the following.
1) Please provide me with a document that provides detailed information.
2) Is this warning limited to a silicon version?
3) Is there a silicon version planned to fix this warning?
(Warning Infomation)
CPU1:EPWMCLKDIV
ePWM TZFRC and TZCLR events will sometimes be missed when EPWMCLKDIV is devide by2. Always program EPWMCLKDIV to devide by 1 if using TZFRC or TZCLR register. Please refer to the F2837xD Sikicon Errata more Details.
Thank you and best regards,
S.Kasai