Part Number: TMS320F280039C
Other Parts Discussed in Thread: C2000WARE
Hi TI experts,
I'm using expf() rts2800_fpu32_fast_supplement.lib on TMS320F280039C and have some questions about the FPUmathTables section behavior.
What I observed
In my project, the CMD file does not configure the FPUmathTables section at all, and I didn't add any manual copy code. However, during debugging, I found that the math tables seem to be automatically copied from ROM to the BOOT_RSVD area (around 0x000002) in RAM.
My questions
1: Is this automatic copy performed by the Boot ROM itself? Or is it done by the linker/startup code? What triggers this behavior?
2: When the CMD file has no configuration at all for FPUmathTables, what is the linker's default handling logic?
3: I'm also getting a linker warning (see details below). How can I properly eliminate it
MEMORY
{
BEGIN : origin = 0x00090000, length = 0x00000002
BOOT_RSVD : origin = 0x00000002, length = 0x00000126
RAMM0 : origin = 0x00000128, length = 0x000006D0
// RAMM0 : origin = 0x00000128, length = 0x000002D8
// RAMM1 : origin = 0x00000400, length = 0x000003F8
// RAMM1_RSVD : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMLS_CLAprog : origin = 0x00008000, length = 0x00002000
RAMLS4567 : origin = 0x0000A000, length = 0x00002000
RAMGS012 : origin = 0x0000C000, length = 0x00003000
// RAMGS1 : origin = 0x0000D000, length = 0x00001000
// RAMGS2 : origin = 0x0000E000, length = 0x00001000
RAMGS3 : origin = 0x0000F000, length = 0x00000F60
// RAMGS3_RSVD : origin = 0x0000FFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
BOOTROM : origin = 0x003F8000, length = 0x00007FC0
SECURE_ROM : origin = 0x003F2000, length = 0x00006000
RESET : origin = 0x003FFFC0, length = 0x00000002
/* Flash sectors */
//FLASH_BANK0 : origin = 0x080000, length = 0x10000 //BOOTLOADER AND DATA_STORAGE
FLASH_BANK1 : origin = 0x090002, length = 0x0FFDE //CODE
//FLASH_BANK2 : origin = 0x0A0000, length = 0x10000 //PROGRAM_BACKUP
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
DMA_CPUData_FSIRX : origin = 0x0000FF60, length = 0x00000020
DMA_CPUData1 : origin = 0x0000FF80, length = 0x00000020
DMA_CPUData2 : origin = 0x0000FFA0, length = 0x00000020
DMA_CPUData3 : origin = 0x0000FFC0, length = 0x00000020
DMA_CPUData4 : origin = 0x0000FFE0, length = 0x00000020
CLA2_MSGRAMLOW : origin = 0x001680, length = 0x000080
// CLA2_MSGRAMHIGH : origin = 0x001700, length = 0x000080
DMA_Data1 : origin = 0x001700, length = 0x000020
DMA_Data2 : origin = 0x001720, length = 0x000020
DMA_Data3 : origin = 0x001740, length = 0x000020
DMA_Data4 : origin = 0x001760, length = 0x000020
}
SECTIONS
{
.cinit : > FLASH_BANK1, ALIGN(4)
.text : >>FLASH_BANK1, ALIGN(4)
codestart : > BEGIN, ALIGN(4)
.stack : > RAMM0
.switch : > FLASH_BANK1, ALIGN(4)
.init_array : > FLASH_BANK1, ALIGN(4)
.bss : > RAMLS4567
.bss:output : > RAMLS4567
.bss:cio : > RAMLS4567
.data : > RAMLS4567
.sysmem : > RAMLS4567
.const : > FLASH_BANK1 ALIGN(4)
.ebss : > RAMLS4567
ramgs : > RAMGS3
.reset : > RESET, TYPE = DSECT /* not used, */
dclfuncs : > FLASH_BANK1, ALIGN(4)
/* CLA specific sections */
Cla1Prog : LOAD = FLASH_BANK1,
RUN = RAMLS_CLAprog,
LOAD_START(Cla1ProgLoadStart),
RUN_START(Cla1ProgRunStart),
LOAD_SIZE(Cla1ProgLoadSize),
ALIGN(4)
//
//Load tables to Flash and copy over to RAM
//
CLA1mathTables : LOAD = FLASH_BANK1,
RUN = RAMLS4567,
RUN_START(CLA1mathTablesRunStart),
LOAD_START(CLA1mathTablesLoadStart),
LOAD_SIZE(CLA1mathTablesLoadSize),
ALIGN(4)
DMA_CPUData_FSIRXFile : > DMA_CPUData_FSIRX
DMA_CPUData1File : > DMA_CPUData1
DMA_CPUData2File : > DMA_CPUData2
DMA_CPUData3File : > DMA_CPUData3
DMA_CPUData4File : > DMA_CPUData4
Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH
Cla1ToDMAMsgRAM : > CLA2_MSGRAMLOW
// DmaToCla1MsgRAM : > CLA2_MSGRAMHIGH
DMA_Data1File : > DMA_Data1
DMA_Data2File : > DMA_Data2
DMA_Data3File : > DMA_Data3
DMA_Data4File : > DMA_Data4
GROUP
{
.TI.ramfunc
// { -l UserFunc_LLC.obj(.text)}
// { -l Com_FSI.obj(.text)}
// { -l Lib_LLC.obj(.text)}
// { -l Serial_SCI.obj(.text)}
// { -l DataStorage_Flash_API.obj(.text)}
// { -l FAPI_F28003x_EABI_v1.58.10.lib}
{ -l UserFunc_PMSM.obj(.text)}
{ -l Lib_3PPWM.obj(.text)}
{ -l Lib_PMSM_FOC.obj(.text)}
} LOAD = FLASH_BANK1,
RUN = RAMGS012
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(4)
.TI.ramconsts : LOAD = FLASH_BANK1
RUN = RAMLS4567
RUN_START(Ramconsts_runstart),
LOAD_START(Ramconsts_loadstart),
LOAD_SIZE(Ramconsts_loadsize)
.scratchpad : > RAMLS4567
.bss_cla : > RAMLS4567
Cla1DataRam : > RAMLS4567
cla_shared : > RAMLS4567
CLADataLS1 : > RAMLS4567
.const_cla : LOAD = FLASH_BANK1,
RUN = RAMLS4567,
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize),
ALIGN(4)
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
<Linking>
"../28003x_cla_flash_lnk.cmd", line 147: warning #10423-D: No placement specified for "FPUmathTables"; a default placement will be applied.
Finished building target: "test.out"Could you please clarify the mechanism? Thank you!
