TMS320F28P659DK-Q1: Issue NMI to remote core

Jwalant Dholakia

I have the following use case for a dual core setup -

CPU1 receives an NMI when a specific GPIO pin has logic level change.
CPU1 issues an NMI to CPU2 once it is interrupted.

I have #1 working properly. For CPU2, I am using ERAD module counter to accomplish that with the following setting (on CPU2) side

My assumption is the EVENT_CPUX_NMI here means if the other CPU receives and NMI, the count will increment (Ref Table 13.1 of SPRUIZ1b)

Unfortunatley, there is no information on EVENT_CPUX_NMI within that document or anywhere on TI.com.

Can you provide guidance how can I achive both objectives?

Thank you.

3 days ago

0 Prarthan Bhatt 2 days ago

TI__Mastermind 18986 points

Hi,

Jwalant Dholakia said:
For CPU2, I am using ERAD module counter to accomplish that with the following setting (on CPU2) side

CPUx NMI means respective CPU's NMI when triggered. Each CPU has separate ERAD module for itself.

Jwalant Dholakia said:
CPU1 issues an NMI to CPU2 once it is interrupted.

By interrupted, do you mean when CPU1 interrupt is triggered or CPU1 NMI is triggered you want to trigger CPU2 NMI at the same time ?

You can do same configuration in CPU2 ERAD to trigger NMI for CPU2

Thanks

0 Jwalant Dholakia 2 days ago in reply to Prarthan Bhatt

Prodigy 90 points

What I meant is that whenever CPU1 receives an NMI, at the same time CPU2 should get an NMI also. Alternatively, when CPU1 receives an NMI, programmatically CPU1 can issue an NMI to CPU2.

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TMS320F28P659DK-Q1: Issue NMI to remote core