TMS320F280049: CLB does not output

Part Number: TMS320F280049

Dear members,

I was wondering if you can help me: I´m new in FW design using the CLB and I´m experiencing some issues that I cannot make it work... 

Below you can find the code: I want to compare with an AND gate the up_down direction and the PWM CMPC which is set 50%. 

I also tried to just give to the AND gate the "CLB_GLOBAL_IN_MUX_EPWM2_CTRDIR" on all 4 inputs but I do not get any response on the output... 

Any ideas what could be the issue?

Thanks for your support!

#define CFG_OUTLUT_LUT          0x550007
#define LUT4_IN0                        0x18
#define LUT4_IN1                        0x18
#define LUT4_IN2                        0x19
#define LUT4_IN3                        0x19
#define LUT4_FN10                     ((0x00000) | 0xa0a0)
#define LUT4_FN2                       0x0

void ZVS_CLB_Init(void)
{
    EALLOW;
    //Mask Output Channels 4 & 5 (Bits 4 and 5 = 0x30)
    CLB_setOutputMask(CLB1_BASE, (1UL << 4UL) | (1UL << 5UL), true);

    // 1. Enable Peripheral Clocks
    SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLB1);

    ////Initialization of inputs

    // Map IN1 to EPWM2C (Action Qualifier pulse generated at CMPC down-count)
    CLB_configLocalInputMux(CLB1_BASE, CLB_IN0, CLB_LOCAL_IN_MUX_GLOBAL_IN);
    CLB_configGlobalInputMux(CLB1_BASE, CLB_IN0, CLB_GLOBAL_IN_MUX_EPWM2_CTR_CMPC);
    CLB_configGPInputMux(CLB1_BASE, CLB_IN0, CLB_GP_IN_MUX_EXTERNAL);
    CLB_enableSynchronization(CLB1_BASE, CLB_IN0);
    CLB_selectInputFilter(CLB1_BASE, CLB_IN0, CLB_FILTER_NONE);

    // Map IN2 to EPWM1 Counter Direction (1 = DOWN, 0 = UP)
    CLB_configLocalInputMux(CLB1_BASE, CLB_IN1, CLB_LOCAL_IN_MUX_GLOBAL_IN);
    CLB_configGlobalInputMux(CLB1_BASE, CLB_IN1, CLB_GLOBAL_IN_MUX_EPWM2_CTRDIR);
    CLB_configGPInputMux(CLB1_BASE, CLB_IN1, CLB_GP_IN_MUX_EXTERNAL);
    CLB_enableSynchronization(CLB1_BASE, CLB_IN1);
    CLB_selectInputFilter(CLB1_BASE, CLB_IN1, CLB_FILTER_NONE);

    //// Initialization of the output LUT0
    CLB_configOutputLUT(CLB1_BASE, CLB_OUT5, CFG_OUTLUT_LUT);
   
    // Output to a GPIO through the XBAR
    XBAR_setOutputMuxConfig(XBAR_OUTPUT3, XBAR_OUT_MUX03_CLB1_OUT5);
    XBAR_enableOutputMux(XBAR_OUTPUT3, XBAR_MUX03);
    GPIO_setDirectionMode(14U, GPIO_DIR_MODE_OUT);
    GPIO_setQualificationMode(14U, GPIO_QUAL_ASYNC);
    GPIO_setPinConfig(GPIO_14_OUTPUTXBAR3);

    //// Configuration of look up table 0
    // inputs
    CLB_selectLUT4Inputs(CLB1_BASE,LUT4_IN0, LUT4_IN1, LUT4_IN2, LUT4_IN3);
    // function of LUT
    CLB_configLUT4Function(CLB1_BASE, LUT4_FN10, LUT4_FN2);

    EDIS;
    // Enable CLB Tile 1
    CLB_enableCLB(CLB1_BASE);