Part Number: TMS320F280049C
Hello Team,
I am using the SCI bootloader examples:
flashapi_ex2_sciKernel.c
flashapi_ex3_liveFirmwareUpdate.c
I have modified the SCI Kernel to use Sector0 to Sector3 and the Application Code to use Sector4 to Sector7. Both the Kernel and Application have been configured in Bank0.
The bootloading process is working correctly without any issues. However, I observed that the kernel writes the application image without validating the target sectors, which corrupt the memory.
1.My First Concern
I created two different application images:
Application1:
The application is linked to Sector4 to Sector7.
Bootloading works as expected.
No issues are observed.
Application2:
The application is linked to Sector0 to Sector3, overlapping with the sectors occupied by the Kernel.
The bootloader still accepts and programs the image.
It rewrites Sector0 to Sector3, where the kernel itself resides.
After programming, the memory becomes corrupted, and the device no longer functions correctly.
My question is:
Why does the bootloader not prevent programming of the sectors occupied by the kernel? Is there any built-in sector protection mechanism that I am missing, or should this validation be implemented by the user?
2.My Second Concern: Address 0x8EFF0
I have doubts regarding the address 0x8EFF0.
I noticed that this address contains the following values:
0x8EFF0
48
2120
Questions:
What is the significance of address 0x8EFF0 in the SCI bootloader?
What do the values 48 and 2120 represent?
How are these values used during the boot process?
My current Application flash memory configuration linker is shown below:
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x08EFF0, length = 0x000002
RAMM0 : origin = 0x0000F6, length = 0x00030A
RAMLS03 : origin = 0x008000, length = 0x002000
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
/* BANK 0 */
/*Default*/
FLASH_BANK0_SEC0 : origin = 0x080000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC4 : origin = 0x084008, length = 0x000FF8 /* on-chip Flash */
FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x004000 /* on-chip Flash */
/* FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
/* FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
/* FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x000FF0 /* on-chip Flash */
FLASH_BANK0_SEC15 : origin = 0x08EFF2, length = 0x00100E /* on-chip Flash */
/* BANK 1 */
FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */
// FLASH_BANK1_SEC15_RSVD : origin = 0x09FFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x0000F1 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000360 /* on-chip RAM block M1 */
FLASH_API_ROM_RSVD : origin = 0x760, length = 0x000020 /* Required by Flash API from ROM */
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6 : origin = 0x00B000, length = 0x000800
RAMLS7 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x002000
RAMGS1 : origin = 0x00E000, length = 0x002000
RAMGS2 : origin = 0x010000, length = 0x002000
RAMGS3 : origin = 0x012000, length = 0x001FF8
// RAMGS3_RSVD : origin = 0x013FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0, ALIGN(4)
.text : >>FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 | FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 , PAGE = 0, ALIGN(4)
.cinit : > FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 | FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 , PAGE = 0, ALIGN(4)
.pinit : > FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 | FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 , PAGE = 0, ALIGN(4)
.switch : > FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 | FLASH_BANK0_SEC6 | FLASH_BANK0_SEC7 , PAGE = 0, ALIGN(4)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.cio : > RAMLS03, PAGE = 0
.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS6, PAGE = 1
.esysmem : > RAMLS6, PAGE = 1
.econst : > FLASH_BANK0_SEC7, PAGE = 0, ALIGN(4)
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
GROUP
{
.TI.ramfunc
} LOAD = FLASH_BANK0_SEC4 | FLASH_BANK0_SEC5 ,
RUN = RAMLS03,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
DataBufferSection : > RAMM1, PAGE = 1, ALIGN(4)
}
/*
//========================================================
// End of file.
//========================================================*/
3.My Third Concern
Currently, I am using only Sector4 to Sector7 for the application.
Can I also use Sector14 and Sector15 for application code storage?
Can I utilize all the remaining sectors in Bank1 for the application image?
Are there any bootloader or flash API restrictions that would prevent using these sectors?
I would appreciate any guidance on the above points.
Thank you
