TMS320F280039C: C2000 Solution for 590–950VDC to 50V / 100kW DC/DC Application

Hi C2000 Team,

We have a customer developing a high-power isolated DC/DC converter with the following target specifications:

• Input voltage: 590VDC ~ 950VDC
• Output voltage: 50VDC
• Total output power: 100kW
• Target architecture: Modular / interleaved power stages
• Candidate topology: LLC / CLLLC / DAB
• Power device: 1200V SiC MOSFET / SiC power module

Due to the wide input voltage range and high output current (~2,000A at full load), we are considering implementing the system with multiple power modules in parallel instead of a single 100kW converter.

For example, one possible architecture is 5 × 20kW modules, with each module providing approximately 50V / 400A.

We would like to ask for C2000 BU's recommendation on the following:

1. Topology recommendation
   For 590–950VDC input, 50V output and 100kW total power, which topology would C2000 BU recommend: LLC, CLLLC, DAB, or another topology?
2. C2000 device recommendation
   Which C2000 MCU would be suitable for controlling a 10–20kW isolated DC/DC power module, including PWM generation, voltage/current control loops, protection and current sharing?
3. Interleaved / multi-module control
   Does C2000 have an existing solution or reference architecture for controlling multiple LLC/CLLLC/DAB power stages with phase interleaving and active current sharing?
4. Reference design
   Does TI have any C2000 reference design close to an 800–1000V DC bus isolated DC/DC application that could be used as the starting point for scaling to a 10–20kW power module?
5. Software support
   Is there an existing Digital Power SDK example for LLC, CLLLC or DAB that BU would recommend as the software starting point for this project?
6. 100kW system architecture
   From the C2000 control perspective, would BU recommend:
   • one C2000 controlling multiple power stages, or
   • one C2000 per 10–20kW module with a higher-level controller coordinating current sharing?

The customer is currently at the topology/architecture definition stage, so we would especially appreciate BU's recommendation on the topology, C2000 device selection, and suitable TI reference design before the hardware architecture is finalized.

Thanks for your support.

Best Regards,
Jony