Part Number: TMS320F28P650SH
Other Parts Discussed in Thread: C2000WARE
Hello,
I am trying to configure a custom boot configuration for the TMS320F28P650SH. Our hardware design has connected the SCI bus to the wrong GPIO's. And so I need to configure a custom boot to select different GPIO's for SCI boot.
I want to use GPIO72 to select the boot mode, where 0 = SCI boot and 1 = Flash boot.
For SCI boot I want to use GPIO84 and GPIO85 for TX and RX.
I figured out I needed to write these values to OTP memory to make this happen:
- Z1-OTP-BOOTPIN-CONFIG (0x00078008) = 0x5AFFFF48
- Z1-OTP-BOOTDEF-LOW (0x00078000C) = 0xFFFF0321
The 0x5A is the key to make the Z1-OTP-BOOTPIN-CONFIG valid. Then the 0x48 is to set GPIO72 as Boot Mode Select Pin 0 (BMSP0). Both BMSP1 and BMSP2 are not used because they are set to 0xFF.
Then 0x03 (flash boot) is used for BOOT_DEF1 (bits 15:8) for when GPIO72 is high, and 0x21 (SCI boot with GPIO84/85) is used for BOOT_DEF0 (bits 7:0) for when GPIO72 is low.
Problem
I've loaded this into OTP. But the device will not go into SCI boot mode. It always goes into flash boot.
I've checked the voltage on GPIO72 and this is correct.
I also tried to debug the bootrom of the device. But when I load the .out file the code is not in sync with what is running on the target. The F28P65x_CPU1_ROM.map file in C2000Ware V26 also tells me that it is build for the F28006x instead of F28P65x:
******************************************************************************
TMS320C2000 Linker PC v20.2.7
******************************************************************************
>> Linked Thu Feb 23 16:06:33 2023
OUTPUT FILE NAME: <F28006x_CPU1_ROM.out>
ENTRY POINT SYMBOL: "InitBoot" address: 003feaa2
....
Can someone please check if I am configuring the OTP correctly?
And how can I properly debug the bootrom?
Many thanks in advance.
Erik Heuvelman
