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Concerto Clock Tree

I have found what I believe to be an error in the data sheet and technical reference guide.  In the “Clocks and Low Power Mode” diagram for the C28, it shows that C28SYSCLK goes directly to the McBSP, SCI, SPI, and TIMER 2 modules.  I have looked at the documentation for the SCI module, and I don’t see any way to select between the C28SYSCLK and the LSPCLK.  I believe that only the LSPCLK is directed to the McBSP, SCI, and SPI peripherals and that the C28SYSCLK should not be drawn directly connected to them, as the C28SYSCLK is connected through the LSPCLK.  I believe the same is true for the TIMER2 peripheral, which gets TMR2CLK.

  • Jason,

    The register interface of all peripherals gets clocked by the system clock, hence on these diagrams the system clock is brought to all peripherals.  In the case of peripherals like those you mentioned a second Low Speed Peripheral Clock is brought to them to clock the core communications logic.  I suppose this is confusing to those less experienced with digital logic design, but these diagrams are in fact correct.

    Trey